• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.393-393
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• 2012

Optically active nanostructures such as subwavelength moth-eye antireflective structures or surface enhanced Raman spectroscopy (SERS) active structures have been demonstrated to provide the effective suppression of unwanted reflections as in subwavelength structure (SWS) or effective enhancement of selective signals as in SERS. While various nanopatterning techniques such as photolithography, electron-beam lithography, wafer level nanoimprinting lithography, and interference lithography can be employed to fabricate these nanostructures, roll-to-roll (R2R) nanoimprinting is gaining interests due to its low cost, continuous, and scalable process. R2R nanoimprinting requires a master to produce a stamp that can be wrapped around a quartz roller for repeated nanoimprinting process. Among many possibilities, two different types of mask can be employed to fabricate optically active nanostructures. One is self-assembled Au nanoparticles on Si substrate by depositing Au film with sputtering followed by annealing process. The other is monolayer silica particles dissolved in ethanol spread on the wafer by spin-coating method. The process is optimized by considering the density of Au and silica nano particles, depth and shape of the patterns. The depth of the pattern can be controlled with dry etch process using reactive ion etching (RIE) with the mixture of SF6 and CHF3. The resultant nanostructures are characterized for their reflectance using UV-Vis-NIR spectrophotometer (Agilent technology, Cary 5000) and for surface morphology using scanning electron microscope (SEM, JEOL JSM-7100F). Once optimized, these optically active nanostructures can be used to replicate with roll-to-roll process or soft lithography for various applications including displays, solar cells, and biosensors.

• 대한기계학회논문집B
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• 제26권4호
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• pp.524-530
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• 2002

Micro electric spark discharge device was fabricated on a FOTURAN glass wafer using MEMS processing technique and its performance of electron discharge and subsequent formation of ignition kernel were tested. Micro electric spark device is an essential subsystem of a power MEMS that has been under development in this laboratories. In a combustion chamber of sub millimeter scale depth, spark electrodes are formed by electroplating Ni on a base plate of FOTURAN glass wafer. Optimization of spark voltage and spark gap is crucial for stable ignition and endurance of the electrodes. Namely, wider spark gaps insures stable ignition but requires higher ignition voltage to overcome the spark barrier. Also, electron discharge across larger voltage tends to erode the electrodes limiting the endurance of the overall system. In the present study, the discharge characteristics of the proptotype ignition device was measured in terms of electric quantities such as voltage and currant with spark gap and end shape as parameters. Discharge voltage shows a little decrease in width of less than 50㎛ and increases with electrode gap size. Reliability test shows no severe damage over 10$\^$6/ times of discharge test resulting in satisfactory performance for application to proposed power MEMS devices.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2000년도 춘계학술대회 논문집
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• pp.1051-1054
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• 2000

We developed the micro CSF (celebrospinal fluid) shunt valve with surface and bulk micromachining technology in polymer MEMS. This micro CSF shunt valve was formed with four micro check valves to have a membrane connected to the anchor with the four bridges. The up-down movement of the membrane made the CSF on & off and the valve characteristic such as open pressure was controlled by the thickness and shape of the bridge and the membrane. The membrane, anchor and bridge layer were made of the $O_2$ RIE (reactive ion etching) patterned Parylene thin film to be about 5~10 microns in thickness on the silicon wafer. The dimension of the rectangular nozzle is 0.2＊0.2 $\textrm{mm}^2$ and the membrane 0.45 mm in diameter. The bridge width is designed variously from 0.04 mm to 0.12 mm to control the valve characteristics. To protect the membrane and bridge in the CSF flow, we developed the packaging system for the CSF micro shunt valve with the deep RIE of the silicon wafer. Using this package, we can control the gap size between the membrane and the nozzle, and protect the bridge not to be broken in the flow. The total dimension of the assembled system is 2.5＊2.5 $\textrm{mm}^2$ in square, 0.8 mm in height. We could precisely control the burst pressure and low rate of the valve varing the design parameters, and develop the whole CSF shunt system using this polymer MEMS fabricated CSF shunt valve.

• 마이크로전자및패키징학회지
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• 제18권1호
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• pp.15-21
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• 2011

전자기기의 고집적화를 위해 실리콘 웨이퍼의 두께가 점점 얇아지고 있으며 이로 인해 제조공정 중 균열이나 파손이 발생할 가능성이 높아지고 있다. 본 연구에서는 300 ${\mu}m$~100 ${\mu}m$ 두께의 반도체용 단결정 실리콘 웨이퍼의 파단 강도 및 파괴특성을 평가하였다. 기계적 연마를 통해 두께 (300, 200, 180, 160, 150, 100 ${\mu}m$)가 다른 실리콘 웨이퍼를 준비하였다. 하나의 웨이퍼에서 40개의 실리콘 다이(크기 : 62.5 mm${\times}$4 mm)를 얻어 4점 굽힘시험을 통해 평균 강도값을 구하였다. 강도분포의 통계적 해석을 위해 와이블 선도를 이용하여 형상인자(와이블 계수)와 크기인자(확률적 파괴강도)를 얻었다. 취성 실리콘 다이의 시편 크기(두께)효과와 파단 확률이 고려된 통계적 파단강도 값을 실리콘 다이 두께의 함수로 얻었다. 관찰된 파괴양상을 측정된 파단강도와 관련하여 고찰하였다.

• KSTLE International Journal
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• 제6권2호
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• pp.33-38
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• 2005

Submicron-scale patterns made of polymethyl methacrylate (PMMA) were fabricated on silicon-wafer using a capillarity-directed soft lithographic technique. Polyurethane acrylate (PUA) stamps (Master molds) were used to fabricate the patterns. Patterns with three different aspect ratios were fabricated by varying the holding time. The patterns fabricated were the negative replica of the master mold. The patterns so obtained were investigated for their adhesion and friction properties at nano-scale using AFM. Friction tests were conducted in the range of 0-80 nN. Glass (Borosilicate) balls of diameter 1.25 mm mounted on cantilever (Contact Mode type NPS) were used as tips. Further, micro-friction tests were performed using a ball-on-flat type micro-tribe tester, under reciprocating motion, using a soda lime ball (1 mm diameter) under a normal load of 3,000 mN. All experiments were conducted at ambient temperature ($24{\pm}1^{\circ}C$) and relative humidity ($45{\pm}5\%$). Results showed that the patterned samples exhibited superior tribological properties when compared to the silicon wafer and non-patterned sample (PMMA thin film) both at the nano and micro-scales, owing to their increased hydrophobicity and reduced real area of contact. In the case of patterns it was observed that their morphology (shape factor and size factor) was decisive in defining the real area of contact.

• 한국재료학회지
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• 제29권3호
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• pp.155-159
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• 2019

Surface plasmon resonance is the resonant oscillation of conduction electrons at the interface between negative and positive permittivity material stimulated by incident light. In particular, when light transmits through the metallic microhole structures, it shows an increased intensity of light. Thus, it is used to increase the efficiency of devices such as LEDs, solar cells, and sensors. There are various methods to make micro-hole structures. In this experiment, micro holes are formed using a wet chemical etching method, which is inexpensive and can be mass processed. The shape of the holes depends on crystal facets, temperature, the concentration of the etchant solution, and etching time. We select a GaAs(100) single crystal wafer in this experiment and satisfactory results are obtained under the ratio of etchant solution with $H_2SO_4:H_2O_2:H_2O=1:5:5$. The morphology of micro holes according to the temperature and time is observed using field emission - scanning electron microscopy (FE-SEM). The etching mechanism at the corners and sidewalls is explained through the configuration of atoms.

• 한국광학회지
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• 제15권1호
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• pp.79-85
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• 2004

후면의 석영면에 위상 패턴을 형성하여 투과율 조절을 구현한 포토마스크에 대해 보고한다. 위상 패턴의 크기와 패턴 조밀도에 따른 조명 동공의 형태 변화에 관한 이론적 결과와 투과율 조절 포토마스크를 사용한 웨이퍼 상 CD(critical dimension) 균일도 개선에 관한 실험적 결과에 대해 기술한다. 투과율 조절을 위한 위상 패턴은 패턴이 형성되지 않은 영역에 대해 180$^{\circ}$의 상대적 위상을 갖도록 석영면을 식각한 콘택홀 형태의 패턴을 사용하였다. 콘택홀 패턴의 크기가 작을수록 본래의 조명동공 형태를 유지하게 되며, 동일한 패턴 조밀도에서 더욱 큰 노광 광세기 저하가 일어남을 알 수 있었다. 패턴 조밀도를 위치별로 변화시켜 CD균일도 개선에 적합한 투과율 분포를 포토마스크 후면에 형성하였다. 투과율 조절 포토마스크를 140nm 디자인 롤을 갖고 있는 DRAM(Dynamic Random Access Memory)의 한 주요 레이어에 적용하여 CD 균일도를 3$\sigma$값으로 24.0nm에서 10.7nm 로 개선할 수 있었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1999년도 제17회 학술발표회 논문개요집
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• pp.83-83
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• 1999

본 연구에서는 Auger Elecrtron Spectroscopy (AES) 장비를 이용하여 Silicone Wafer 표면에 BF 이온을 주입시킨 후 Dopping 농도 및 Implantation 에너지에 따른 Si KLL Peak의 변화를 관찰하였다. 또한 PVD Ti 계열 화학물의 시료에 대하여 Peak의 Shape 변화를 관찰하였다. 1)Dopping 농도 및 Implantation 에너지에 따른 Si KLL Peak의 변화 관찰 일반적으로 Silicone 기판에 Arsenic(3가)을 Dopping 하였을 경우, Si KLL Peak의 Kinetic Energy 값은 순수 Si Peak보다 더 작은 값으로 Shift 하며, Boron (5가)을 Dopping하였을 경우에는 더 큰 값으로 Shift 한다. 이론적으로 N-type Si의 에너지 차이는 약 1.0eV로 보고되어 있으며, AES를 이용하여 실험적으로 측정된 값은 약 0.6eV정도로 알려져 있다. 이러한 차이는 Dopping 농도에 따라 Valance Band의 에너지 값이 변화하기 때문이라고 알려져 있다. 본 연구에서는 BF2를 Si에 이온 주입하여 입사 에너지 및 dose 량에 따른 Si KLL Peak의 변화를 관찰하였다. 그림1과 같이 Si KLL Peak는 Implantation Energy가 작을수록 Kinetic Energy가 높은 곳으로 Shift 한다. 이는 LOw Energy로 이온 주입하면, Projected Range (Rp)가 High Energy로 이온 주입할 때보다 작기 때문이며, 이 결과를 Secondary Ion Mass Spectroscopy (SIMS) 및 TRIM simulation을 이용하여 확인하였다. 또한 표면에서의 전자 Density의 변화와 Implantation energy와의 관계를 시료의 표면에서 반사되어 나오는 전자의 에너지 손실(Reflected Electron Energy Loss Spectroscopy:REELS)을 통하여 고찰하였다. 2) PVD Ti 계열화합물의 시료에 대한 peak의 shape 가 변화하며, TiL3M23V (Ti2) 및 TiL3M23M23 (Til) Peak의 Intensity Ratio가 변화한다. 따라서 본 연구에서는 그림 2와 같이 Ti 결합 화합물에서의 Ti Auger Peak의 특성 에너지 값과 Peak Shape를 관찰하여, AES를 이용하여 Ti 계열의 화합물에 대한 Chemical state 분석의 가능성을 평가하였다.

• Design & Manufacturing
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• 제16권3호
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• pp.58-65
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• 2022

Micro-fluidic chip has been fabricated by lithography process on silicon or glass wafer, casting using PDMS, injection molding of thermoplastics or 3D printing, etc. Among these processes, 3D printing can fabricate micro-fluidic chip directly from the design without master or template for fluidic channel fabricated previously. Due to this direct printing, 3D printing provides very fast and economical method for prototyping micro-fluidic chip comparing to conventional fabrication process such as lithography, PDMS casting or injection molding. Although 3D printing is now used more extensively due to this fast and cheap process done automatically by single printing machine, there are some issues on accuracy or surface characteristics, etc. The accuracy of the shape and size of the micro-channel is limited by the resolution of the printing and printing direction or layering direction in case of SLM type of 3D printing using UV curable resin. In this study, the printing direction and thickness of each printing layer are investigated to see the effect on the size, shape and surface of the micro-channel. A set of micro-channels with different size was designed and arrayed orthogonal. Micro-fluidic chips are 3D printed in different directions to the micro-channel, orthogonal, parallel, or skewed. The shape of the cross-section of the micro-channel and the surface of the micro-channel are photographed using optical microscopy. From a series of experiments, an optimal printing direction and process conditions are investigated for 3D printing of micro-fluidic chip.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.454-454
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• 2014

Silicon microwire array is one of the promising platforms as a means for developing highly efficient solar cells thanks to the enhanced light trapping efficiency. Among the various fabrication methods of microstructures, deep reactive ion etching (DRIE) process has been extensively used in fabrication of high aspect ratio microwire arrays. In this presentation, we show precisely controlled Si microwire arrays by tuning the DRIE process conditions. A periodic microdisk arrays were patterned on 4-inch Si wafer (p-type, $1{\sim}10{\Omega}cm$) using photolithography. After developing the pattern, 150-nm-thick Al was deposited and lifted-off to leave Al microdisk arrays on the starting Si wafer. Periodic Al microdisk arrays (diameter of $2{\mu}m$ and periodic distance of $2{\mu}m$) were used as an etch mask. A DRIE process (Tegal 200) is used for anisotropic deep silicon etching at room temperature. During the process, $SF_6$ and $C_4F_8$ gases were used for the etching and surface passivation, respectively. The length and shape of microwire arrays were controlled by etching time and $SF_6/C_4F_8$ ratio. By adjusting $SF_6/C_4F_8$ gas ratio, the shape of Si microwire can be controlled, resulting in the formation of tapered or vertical microwires. After DRIE process, the residual polymer and etching damage on the surface of the microwires were removed using piranha solution ($H_2SO_4:H_2O_2=4:1$) followed by thermal oxidation ($900^{\circ}C$, 40 min). The oxide layer formed through the thermal oxidation was etched by diluted hydrofluoric acid (1 wt% HF). The surface morphology of a Si microwire arrays was characterized by field-emission scanning electron microscopy (FE-SEM, Hitachi S-4800). Optical reflection measurements were performed over 300~1100 nm wavelengths using a UV-Vis/NIR spectrophotometer (Cary 5000, Agilent) in which a 60 mm integrating sphere (Labsphere) is equipped to account for total light (diffuse and specular) reflected from the samples. The total reflection by the microwire arrays sample was reduced from 20 % to 10 % of the incident light over the visible region when the length of the microwire was increased from $10{\mu}m$ to $30{\mu}m$.