• Title/Summary/Keyword: Wafer Cleaning

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Si-Wafer위에 증착된 ITO 박막의 발수특성

  • ;Baek, Cheol-Heum;Seo, Seong-Bo;Kim, Hwa-Min
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.293-293
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    • 2013
  • 최근 디스플레이산업이 발달하면서 투명전도성 물질에 대한 산업의 요구도가 높아지고 있다. ITO투명전도성 박막은 낮은 비저항과 우수한 식각특성을 가지고 있어 평면표시소자, 광소자, 터치패널 그리고 가스 센서 등 다양한 분야에 응용되고 있으며 디스플레이 소자가 소형화 되어감에 따라 박막의 다기능화가 요구되고 있다. 본 실험에서는 전기적 특성과 친, 발수특성을 동시에 가지는 다기능성 ITO 박막을 연구하였다. RIE방식으로 식각을 통하여 Poly Si-wafer 표면에 미세구조를 만든 기판과 Slide Glass기판에 RF-magnetron sputtering 방법을 이용해 ITO박막을 증착하여 비교분석 하였다. ITO박막 증착시 $100{\sim}400^{\circ}C$ 열처리와 산소를 사용하지 않고 Ar 가스만을 사용하여 실험한 후 열처리온도에 따른 전기적 특성 및 접촉각에 대하여 조사하였다. 3 uL의 Di-water를 사용하여 접촉각을 측정한 결과 $400^{\circ}C$ 열처리가 된 Poly si-wafer 위에 증착된 ITO 박막에서 초-친수 특성을 나타냈으며, 그 위에 PTFE을 증착하였을 경우 12 uL의 Di-water를 사용하여 약 $150^{\circ}$ 이상의 초-발수 특성을 나타내었다. 전기적 특성은 $5.8{\times}10^{-4}$의 비 저항을 나타내었다. 이러한 전기적 특성과 친 발수 특성을 동시에 가지는 ITO 박막은 Anti-Fogging, self-Cleaning, Solar cell 및 디스플레이소자 등 다양한 산업에 이용 가능할 것으로 생각된다.

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Design Alterations of a Squaring & Grinding Machine for the Solar Cell Wafer to Suppress Vibrations (Solar Cell Wafer용 Squaring & Grinding Machine의 진동 억제를 위한 설계 변경)

  • Shin, Ho Beom;Ro, Seung Hoon;Yoon, Hyun Jin;Kil, Sa Geun;Kim, Young Jo;Kim, Geon Hyeong;Han, Dae Sung
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.3
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    • pp.47-52
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    • 2017
  • Solar cell industry requires high technologies to stabilize apparatuses for the wafer manufacturing. Vibrations of squaring & grinding machines are one of the most critical factors for causing residual stresses of ingots, which are the main reasons of the breakage in the following processes such as wire sawing, cleaning, and modularity. In this study, the structure of a squaring & grinding machine has been analyzed through experiments and computer simulations to figure out the ways to suppress the vibrations effectively, and further to minimize the breakage of wafers. The result shows that simple design changes of applying a few ribs can improve the stability of the machine.

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The effect of buffing on particle removal in Post-Cu CMP cleaning (Post-Cu CMP cleaning에서 연마입자 제거에 buffing 공정이 미치는 영향)

  • Kim, Young-Min;Cho, Han-Chul;Jeong, Hae-Do
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.537-537
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    • 2008
  • Copper (Cu) has been widely used for interconnection structure in intergrated circuits because of its properties such as a low resistance and high resistance to electromigration compared with aluminuim. Damascene processing for the interconnection structure utilizes 2-steps chemical mechanical polishing(CMP). After polishing, the removal of abrasive particles on the surfaces becomes as important as the polishing process. In the paper, buffing process for the removal of colloidal silica from polished Cu wafer was proposed and demonstrated.

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Plasma source ion implantations for shallow $p^+$/n junction

  • Jeonghee Cho;Seuunghee Han;Lee, Yeonhee;Kim, Lk-Kyung;Kim, Gon-Ho;Kim, Young-Woo;Hyuneui Lim;Moojin Suh
    • Proceedings of the Korean Vacuum Society Conference
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    • 2000.02a
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    • pp.180-180
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    • 2000
  • Plasma source ion implantation is a new doping technique for the formation of shallow junction with the merits of high dose rate, low-cost and minimal wafer charging damage. In plasma source ion implantation process, the wafer is placed directly in the plasma of the appropriate dopant ions. Negative pulse bias is applied to the wafer, causing the dopant ions to be accelerated toward the wafer and implanted below the surface. In this work, inductively couples plasma was generated by anodized Al antenna that was located inside the vacuum chamber. The outside wall of Al chamber was surrounded by Nd-Fe-B permanent magnets to confine the plasma and to enhance the uniformity. Before implantation, the wafer was pre-sputtered using DC bias of 300B in Ar plasma in order to eliminate the native oxide. After cleaning, B2H6 (5%)/H2 plasma and negative pulse bias of -1kV to 5 kV were used to form shallow p+/n junction at the boron dose of 1$\times$1015 to 5$\times$1016 #/cm2. The as-implanted samples were annealed at 90$0^{\circ}C$, 95$0^{\circ}C$ and 100$0^{\circ}C$during various annealing time with rapid thermal process. After annealing, the sheet resistance and the junction depth were measured with four point probe and secondary ion mass spectroscopy, respectively. The doping uniformity was also investigated. In addition, the electrical characteristics were measured for Schottky diode with a current-voltage meter.

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Influence of wafer cleaning on silicon heterojunction solar cells (웨이퍼 세척이 실리콘 이종접합 태양전지에 미치는 영향)

  • Kang, Min-Gu;Tark, Sung-Ju;Lee, Seung-Hun;Park, Sung-Eun;Kim, Chan-Seok;Jeong, Dae-Young;Lee, Jung-Chul;Kim, Dong-Hwan
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.95-95
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    • 2009
  • 실리콘 이종접합 태양전지는 비정질 실리콘을 사용하여 p-n 접합을 만들기 때문에 결정질 태양전지에 비해 개방전압이 높은 특성을 보인다. 그렇지만 결정질 태양전지는 접합을 확산공정으로 만들어 p층과 n층의 계면에서 결함이 존재하지 않는 반면 이종접합 태양전지는 결정질 실리콘 표면에 접합을 만들기 때문에 결정질 실리콘의 표면에 defect이 존재할 가능성이 많아진다. 이번 실험에서 결정질 실리콘의 cleaning 조건 변화에 따른 이종접합 태양전지의 특성변화를 보았다. 실리콘 이종접합 태양전지는 전면전극/ITO/p a-Si:H/i a-Si:H/n c-Si/i a-Si:H/n a-Si:H/후면전극의 구조로 만들으며 p형 및 n형 비정질 실리콘은 PECVD를 이용하여 증착하였고 i형 비정질 실리콘은 HWCVD를 이용하여 증착하였다. 만들어진 태양전지의 특성을 평가하기 위해 암전류 특성, 광전류 특성, 양자효율, 소수반송자수명을 측정하였다.

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A Study on Design of Intelligent Wet Station for Semiconductor (지능형 반도체 세정장비 설계에 관한 연구)

  • Kim Jong Won;Hong Kwagn Jin;Cho Hyun Chan;Kim Kwang Sun;Kim Doo Yong;Cho Jung Keun
    • Journal of the Semiconductor & Display Technology
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    • v.4 no.3 s.12
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    • pp.29-33
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    • 2005
  • As the integrated devices become more and more sophistcated, the diameter of wafers increased up to 300 mm and strict level of cleaning is necessary to remove the particulates on the surface of wafer. Therefore we need a new type of wet-station which can reduce DI water and chemical in the cleaning process. Moreover, it is important to control the temperature and the concentration of chemical in the wet-station. In the conventional chemical supply system, it is difficult not only to fit the mixing rate of chemicals in cleaning process, but also to fit the quantity and temperature. Thus, we propose a new chemicals supply system, which overcomes above problems by the analysis of fluid and thermal transfer on chemical supply system.

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Effect of Post-CMP Cleaning On Electrochemical Characteristics of Cu and Ti in Patterned Wafer

  • Noh, Kyung-Min;Kim, Eun-Kyung;Lee, Yong-Keun;Sung, Yun-Mo
    • Korean Journal of Materials Research
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    • v.19 no.3
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    • pp.174-178
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    • 2009
  • The effects of post-CMP cleaning on the chemical and galvanic corrosion of copper (Cu) and titanium (Ti) were studied in patterned silicon (Si) wafers. First, variation of the corrosion rate was investigated as a function of the concentration of citric acid that was included in both the CMP slurry and the post-CMP solution. The open circuit potential (OCP) of Cu decreased as the citric acid concentration increased. In contrast with Cu, the OCP of titanium (Ti) increased as this concentration increased. The gap in the OCP between Cu and Ti increased as citric acid concentration increased, which increased the galvanic corrosion rate between Cu and Ti. The corrosion rates of Cu showed a linear relationship with the concentrations of citric acid. Second, the effect of Triton X-$100^{(R)}$, a nonionic surfactant, in a post-CMP solution on the electrochemical characteristics of the specimens was also investigated. The OCP of Cu decreased as the surfactant concentration increased. In contrast with Cu, the OCP of Ti increased greatly as this concentration increased. Given that Triton X-$100^{(R)}$ changes its micelle structure according to its concentration in the solution, the corrosion rate of each concentration was tested.

Cr, Ni and Cu removal from Si wafer by remote plasma-excited hydrogen (리모트 수소 플라즈마를 이용한 Si 웨이퍼 위의 Cr, Ni 및 Cu 불순물 제거)

  • 이성욱;이종무
    • Journal of the Korean Vacuum Society
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    • v.10 no.2
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    • pp.267-274
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    • 2001
  • Removal of Cr, Ni and Cu impurities on Si surfaces using remote plasma-excited hydrogen was investigated. Si surfaces were contaminated intentionally by acetone with low purity. To determine the optimum process condition, remote plasma-excited hydrogen cleaning was conducted for various rf-powers and plasma exposure times. After remote plasma-excited hydrogen cleaning, Si surfaces were analyzed by Total X-ray Reflection Fluorescence(TXRF), Surface Photovoltage(SPV) and Atomic Forece Microscope(AFM). The concentrations of Cr, Ni and Cu impurities were reduced and the minority carrier lifetime increased after remote plasma-excited hydrogen. Also RMS roughness decreased by more than 30% after remote plasma-excited hydrogen cleaning. AFM analysis results also show that remote plasma-excited hydrogen cleaning causes no damage to the Si surface. TXRF analysis results show that remote plasma-excited hydrogen cleaning is effective in eliminating metallic impurities from Si surface only if it is performed under an optimum process conditions. The removal mechanism of the Cr, Ni and Cu impurities using remote plasma-excited hydrogen treatments is proposed to be the lift-off during removal of underlying chemical oxides.

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A Study on Si-wafer Cleaning by Electrolyzed Water (전리수를 이용한 실리콘 웨이퍼 세정)

  • Yun, Hyo-Seop;Ryu, Geun-Geol
    • Korean Journal of Materials Research
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    • v.11 no.4
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    • pp.251-257
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    • 2001
  • A present semiconductor cleaning technology is based upon RCA cleaning, high temperature process which consumes vast chemicals and ultra Pure water(UPW). This technology gives rise to the many environmental issues, therefore some alternatives have been studied. In this study, intentionally contaminated Si wafers were cleaned using the electrolyzed water(EW). The EW was generated by an electrolysis equipment which was composed of anode. cathode, and toddle chambers. Oxidative water and reductive water were obtained in anode and cathode chambers, respectively. In case $NH_4$Cl electrolyte, the oxidation-reduction potential(ORP) and pH for anode water(AW) and cathode water(CW) were measured to be +1050mV and 4.7, and -750mV and 9.8, respectively. For cleaning metallic impurities, AW was confirmed to be more effective than that of CW, and the particle distribution after various particle removal processes was shown to be same distribution.

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SOI wafer formation by ion-cut process and its characterization (Ion-cut에 의한 SOI웨이퍼 제조 및 특성조사)

  • Woo H-J;Choi H-W;Bae Y-H;Choi W-B
    • Journal of the Korean Vacuum Society
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    • v.14 no.2
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    • pp.91-96
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    • 2005
  • The silicon-on-insulator (SOI) wafer fabrication technique has been developed by using ion-cut process, based on proton implantation and wafer bonding techniques. It has been shown by SRIM simulation that 65keV proton implantation is required for a SOI wafer (200nm SOI, 400nm BOX) fabrication. In order to investigate the optimum proton dose and primary annealing condition for wafer splitting, the surface morphologic change has been observed such as blistering and flaking. As a result, effective dose is found to be in the $6\~9\times10^{16}\;H^+/cm^2$ range, and the annealing at $550^{\circ}C$ for 30 minutes is expected to be optimum for wafer splitting. Direct wafer bonding is performed by joining two wafers together after creating hydrophilic surfaces by a modified RCA cleaning, and IR inspection is followed to ensure a void free bonding. The wafer splitting was accomplished by annealing at the predetermined optimum condition, and high temperature annealing was then performed at $1,100^{\circ}C$ for 60 minutes to stabilize the bonding interface. TEM observation revealed no detectable defect at the SOI structure, and the interface trap charge density at the upper interface of the BOX was measured to be low enough to keep 'thermal' quality.