• 대한기계학회:학술대회논문집
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• 대한기계학회 2008년도 추계학술대회B
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• pp.2511-2514
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• 2008

As the minimum feature size decreases, techniques to avoid contamination and processes to maintain clean wafer surfaces have become very important. The deposition and detachment of nanoparticles from surfaces are major problem to integrated circuit fabrication. Therefore, cleaning technology which reduces nanoparticles is essential to increase yield. Previous megasonic cleaning technology has reached the limits to reduce nanoparticles. Megasonic cleaning is one of the efficiency method to reduce contamination nanoparticle. Two major mechanisms are active in a megasonic cleaning, namely, acoustic streaming and cavitation. Acoustic streaming does not lead to sufficiently strong force to cause damage to the substrates or patterns. Sonoluminescence is a phenomenon of light emission associated with the cavitation of a bubble under ultrasound. We studied a correlation between sonoluminescence and sound pressure distribution for the minimum of pattern damage in megasonic cleaning.

• 한국레이저가공학회지
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• 제4권3호
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• pp.22-29
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• 2001

A development of new surface clwaning technol ogies such as laser and aerosol in paeallel with the improvement of conventional wet mwthods becomes more essential in semiconductor industry due the confrontation of new challenges such as significant device shrink, environmental foralum inum do not work for copper as a new interconnection material, and more effective cleaning tools are required with decreasing the feature size less than 0.13 ㎛ as well as increasing the wafer size from 200 ㎜ to 300 ㎜. In this article, various cleaning techniques increasing laser cleaning are compared methodolgically hi order to understand their unique characteristics such as advantages and disadvantages according to the current clean ing issues. In particular, the current state of art of laser technique for semiconductors md prospects as a try cleaning method are described.

• 반도체디스플레이기술학회지
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• 제15권4호
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• pp.73-78
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• 2016

Contact pressure distribution between PVA brush and semiconductor wafer was measured by developing a test setup which could simulates the post CMP cleaning process. The test set-up used thin film type pressure sensor which could measure the pressure distribution of contact area with the resolution of $15.5ea/cm^2$. As the experimental results, it was verified that there had been severe contact pressure non-uniformity along the axis of the brush and between the adjacent projections on the brush's surface. These results should be considered when developing post CMP cleaning stage or designing the PVA brush.

• Bulletin of the Korean Chemical Society
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• 제18권7호
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• pp.737-740
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• 1997

The influence of cyclic treatments with H2O2/DIW (1 : 10) and HF/DIW (1 : 100) on the roughness of silicon surface in the wet chemical processing was investigated by atomic force microscopy (AFM). During the step of the SC-1 cleaning, there is a large increase in roughness on the silicon surface which will result in the poor gate oxide breakdown properties. The roughness of the silicon wafer after the SC-1 cleaning step was reduced by cyclic treatments of hydrogen peroxide solution and hydrofluoric acid solution instead of HF-only cleaning. AFM images after each step clearly illustrated that the average roughness of silicon surface after three times treatments with H2O2 and HF solutions was reduced by 10 times compared with that after the SC-1 cleaning step.

• 반도체디스플레이기술학회지
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• 제22권3호
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• pp.21-27
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• 2023

In this article, a plate-type megasonic cleaning system with cooling pins is proposed for the sliced ingot, which is a raw material of silicon (Si) wafers. The megasonic system is operated with a lead zirconate titanate (PZT) actuator, which has high electric resistance, thus when it is being operated, it dissipates much heat. So this article proposes a megasonic system with cooling pins. In the design process, finite element analysis was performed and the results were used for the design of the waveguide. The frequency with the maximum impedance value was 998 kHz, which agreed well with the measured value of 997 kHz with 0.1 % error. Based on the results, the 1 MHz waveguide was fabricated. Acoustic pressures were measured, and analyzed. Finally, cleaning tests were performed, and 90 % particle removal efficiency (PRE) was achieved over 10 W power. These results imply that the developed 1 MHz megasonic will effectively clean sliced ingot wafer surfaces.

• 한국재료학회지
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• 제24권12호
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• pp.682-688
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• 2014

Physical and chemical changes in a polished wafer and in $2.5{\mu}m$ & $4{\mu}m$ epitaxially grown Si layer wafers (Epilayer wafer) after surface treatment were investigated. We characterized the influence of surface treatment on wafer properties such as surface roughness and the chemical composition and bonds. After each surface treatment, the physical change of the wafer surface was evaluated by atomic force microscopy to confirm the surface morphology and roughness. In addition, chemical changes in the wafer surface were studied by X-ray photoemission spectroscopy measurement. Changes in the chemical composition were confirmed before and after the surface treatment. By combined analysis of the physical and chemical changes, we found that diluted hydrofluoric acid treatment is more effective than buffered oxide etching for $SiO_2$ removal in both polished and Epi-Layer wafers; however, the etch rate and the surface roughness in the given treatment are different among the polished $2.5{\mu}m$ and $4{\mu}m$ Epi-layer wafers in spite of the identical bulk structural properties of these wafers. This study therefore suggests that independent surface treatment optimization is required for each wafer type, $2.5{\mu}m$ and $4{\mu}m$, due to the meaningful differences in the initial surface chemical and physical properties.

• 한국멀티미디어학회논문지
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• 제16권6호
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• pp.782-794
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• 2013

본 논문에서는 카메라를 이용한 웨이퍼 위치 인식 알고리즘을 제안한다. 먼저 챔버 외부의 조명 반사와 카메라로 인한 영상의 원근 왜곡을 제거하기 위하여 투영 변환을 적용하여 실제 웨이퍼와 같이 정원의 형태로 복원한다. 다음, 에지 검출 알고리즘을 이용하여 웨이퍼의 외부 경계를 추출한 후, 일반화 대칭 변환을 적용하여 원을 검출함으로서 웨이퍼의 위치를 검사한다. 일반화 대칭 변환은 영상에서 화소쌍들 사이의 대칭값을 거리 가중치 함수, 위상 가중치 함수, 화소들의 기울기 크기와 로그 맵핑이 결합되어 영상에서 관심 영역을 추출한다. 제안하는 방법을 적용하여 웨이퍼가 올바른 위치에 장착되었는가를 검사하여 클리닝 시스템 장비와 웨이퍼의 파손을 미연에 방지한다.

• 한국진공학회지
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• 제9권2호
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• pp.102-109
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• 2000

chemical mechanical Polishing (CMP)공정 중 제거된 막과 연마재의 지꺼기를 제거하기 위하여 일반적으로 사용하는 scrubbing과 같은 기계적인 세정법으로는 기가급 소자 제조시에 요구되는 $10^{10}/\textrm{cm}^2$ 이하의 오염도에 도달하기 어렵다. 따라서 이러한 기계적인 세정법에 이어 충분히 제거되지 못한 금속오염물을 제거하기 위한 2차 세정이 요구된다. 본 논문에서는 리모트 플라스마 세정법과 UV/$O_3$ 세정법을 사용하여 oxide CMP 후에 웨이퍼 표면에 많이 존재하는 K, Fe, Cu등의 금속오염물을 제거하는데 대한 연구결과를 보고하고자 한다. 리모트 수소 플라스마 세정결과에 의하면, 세정시간이 짧을 수록, rf-power가 증가할수록 세정 효과가 우수한 것으로 나타났으며, CMP 공정 후 웨이퍼 표면에 특히 많이 존재하는 금속 불순물인 K, Fe, Cu 등의 오염 제거를 위한 최적 공정 조건은 세정시간이 1분, rf-power가 100 W인 것으로 나타났다. AFM 분석 결과에 의하면 rf-power의 증가에 따라 표면 거칠기가 미소하게 증가하는데 , 이것은 플라스마에 의한 손상 때문인 것으로 보이나 그 정도는 무시할만하다. 한편, UV/$O_3$ 세정의 경우에는 세정공정시간이 30 sec일때 가장 우수한 세정효과가 얻어졌다. 리모트 수소 플라스마 및 UV/$O_3$ 세정방법에 의한 Si 웨이퍼 표면의 금속 불순물 제거기구는 Si표면 금속오염의 하단층에 생성된 $SiO_2H^+$/ 및 $e^-$와 반응하여 $SiO^*$상태로 휘발될 때 금속불순물이 $SiO^*$에 묻어서 함께 제거되는 것으로 사료된다.

• 한국재료학회지
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• 제20권4호
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• pp.210-216
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• 2010

This paper investigates the dependence of a-Si:H/c-Si passivation and heterojunction solar cell performances on various cleaning processes of silicon wafers. It is observed that the passivation quality of a-Si:H thin-films on c-Si wafers depends highly on the initial H-termination properties of the wafer surface. The effective minority carrier lifetime (MCLT) of highly H-terminated wafer is beneficial for obtaining high quality passivation of a-Si:H/c-Si. The wafers passivated by p(n)-doped a-Si:H layers have low MCLT regardless of the initial H-termination quality. On the other hand, the MCLT of wafers incorporating intrinsic (i) a-Si:H as a passivation layer shows sensitive variation with initial cleaning and H-termination schemes. By applying the improved cleaning processes, we can obtain an MCLT of $100{\mu}sec$ after H-termination and above $600{\mu}sec$ after i a-Si:H thin film deposition. By adapting improved cleaning processes and by improving passivation and doped layers, we can fabricate a-Si:H/c-Si heterojunction solar cells with an active area conversion efficiency of 18.42%, which cells have an open circuit voltage of 0.670V, short circuit current of $37.31\;mA/cm^2$ and fill factor of 0.7374. These cells show more than 20% pseudo efficiency measured by Suns-$V_{oc}$ with an elimination of series resistance.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 춘계학술대회 논문집 전자세라믹스 센서 및 박막재료 반도체재료 일렉트렛트 및 응용기술
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• pp.31-34
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• 2000

It is very important to understand the correlation of between inter layer dielectric(ILD) CMP process and various facility factors supplied to equipment system. In this paper, the correlation between the various facility factors supplied to CMP equipment system and ILD CMP process were studied. To prevent the partial over-polishing(edge hot-spot) generated in the wafer edge area during polishing, we analyzed various facilities supplied at supply system. With facility shortage of D.I. water(DIW) pressure, we introduced an adding purified $N_2(PN_2)$ gas in polishing head cleaning station for increasing a cleaning effect. DIW pressure and PN2 gas factors were not related with removal rate, but edge hot-spot of patterned wafer had a serious relation. We estimated two factors (DIW pressure and PN2 gas) for the improvement of CMP process. Especially, we obtained a uniform planarity in patterned wafer and prohibited more than 90% wafer edge over-polishing. In this study, we acknowledged that facility factors supplied to equipment system played an important role in ILD-CMP process.