• Title/Summary/Keyword: Voltage-Stress

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New Zero-Current-Transition (ZCT) Circuit Cell Without Additional Current Stress

  • Kim, C.E.;Park, E.S.;G.W. Moon
    • Journal of Power Electronics
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    • v.3 no.4
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    • pp.215-223
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    • 2003
  • In this paper, a new zero-current-transition (ZCT) circuit cell is proposed. The main switch is turned-off under the zero current and zero voltage condition, and there is no additional current stress and voltage stress in the main switch and the main diode, respectively. The auxiliary switch is turned-off under the zero voltage condition, and the main diode is turned-on under the zero voltage condition. The resonant current required to obtain the ZCT condition is relatively small and regenerated to the input voltage source. The operational principles of a boost converter integrated with the proposed ZCT circuit cell are analyzed and verified by the simulation and experimental results.

Optimal M-level Constant Stress Design with K-stress Variables for Weibull Distribution

  • Moon, Gyoung-Ae
    • Journal of the Korean Data and Information Science Society
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    • v.15 no.4
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    • pp.935-943
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    • 2004
  • Most of the accelerated life tests deal with tests that use only one accelerating variable and no other explanatory variables. Frequently, however, there is a test to use more than one accelerating or other experimental variables, such as, for examples, a test of capacitors at higher than usual conditions of temperature and voltage, a test of circuit boards at higher than usual conditions of temperature, humidity and voltage. A accelerated life test is extended to M-level stress accelerated life test with k-stress variables. The optimal design for Weibull distribution is studied with k-stress variables.

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Transient trap density in thin silicon oxides

  • Kang, C.S.;Kim, D.J.;Byun, M.G.;Kim, Y.H.
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.10 no.6
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    • pp.412-417
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    • 2000
  • High electric field stressed trap distributions were investigated in the thin silicon oxide of polycrystalline silicon gate metal oxide semiconductor capacitors. The transient currents associated with the off time of stressed voltage were used to measure the density and distribution of high voltage stress induced traps. The transient currents were due to the discharging of traps generated by high stress voltage in the silicon oxides. The trap distributions were relatively uniform near both cathode and anode interface in polycrystalline silicon gate metal oxide semiconductor devices. The stress generated trap distributions were relatively uniform the order of $10^{11}$~$10^{12}$ [states/eV/$\textrm{cm}^2$] after a stress. The trap densities at the oxide silicon interface after high stress voltages were in the $10^{10}$~$10^{13}$ [states/eV/$\textrm{cm}^2$]. It was appeared that the transient current that flowed when the stress voltages were applied to the oxide was caused by carriers tunneling through the silicon oxide by the high voltage stress generated traps.

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Voltage Stress of Switching Device in dc/dc Converter (dc/dc 컨버터의 스위칭 소자의 전압 스트레스)

  • Ma, K.S.;Choi, J.H.;Kim, Y.M.
    • Proceedings of the KIEE Conference
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    • 1992.07b
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    • pp.1019-1021
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    • 1992
  • This paper deals with the stress of the converters using the resonant switches. It is represented the reduction of the voltage and current stresses. According to the configuration of the multiple poly-phase converter. Especially, about buck ZVS-QRC it is studied the reduction of the voltage stress, and represented the result of simulation.

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Alternately Zero Voltage Switched Forward, Flyback Multi-Resonant Converter Controller (교번으로 영전압 스위칭 되는 포워드, 플라이백 다중공진형 컨버터의 제어기)

  • 김창선
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.5
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    • pp.7-13
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    • 2002
  • In the resonant converters which can provide high efficiency and high power density, the resonant voltage stress is about 4-5 times the input voltage. It needs the power switch with high ratings. This is a reason why the conduction loss is increased. In this paper, it proposes the alternately zero voltage switched forward, flyback multi resonant converter topology for reducing the voltage stress using alternately zero voltage switching technique. And the proposed AT forward MRC is experimentally considered about the loop gain with HP4194A network analyzer.

Anisotropic stress Effects in p-n junction (p-n 접합에 있어서의 비등방성 응력효과)

  • 손병기;이건일
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.11 no.3
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    • pp.22-26
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    • 1974
  • The effects of anisotropic mechanical stress applied normal to the surface of p-n junctions have been investigated. As the stress increased, the breakdown voltage was decreased and the breakdown mode became softer. Within a certain limitation in the applied stress, the above phenomena werw reversibbe, though relaxation and hysteresis phenomena were observed. The time constant of relaxation depended upon the shape of the stressing tip, but for the given tip and device a unique time constant was obtained. The stress.dependence of breakdown voltage showed a good linearity up to about 3.0${\times}10^4$ kgw/$\textrm{cm}^2$, when the flat tip of radius 15$\mu$ was used, and the temperatere-dependence of breakdown voltage under the stress also showed a good linearity in the temperature range of 100 to $300^{\circ}K$.

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Hot-Carrier-Induced Degradation in Submicron MOS Transistors (Submicron MOS 트랜지스터의 뜨거운 운반자에 의한 노쇠현상)

  • 최병진;강광남
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.7
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    • pp.780-790
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    • 1988
  • We have studied the hot-carrier-induced degradation caused by the high channel electric field due to the decrease of the gate length of MOSFET used in VLSI. Under DC stress, the condition in which maximum substrate current occures gave the worst degradation. Under AC dynamic stress, other conditions, the pulse shape and the falling rate, gave enormous effects on the degradation phenomena, especially at 77K. Threshold voltage, transconductance, channel conductance and gate current were measured and compared under various stress conditions. The threshold voltage was almost completely recovered by hot-injection stress as a reverse-stress. But, the transconductance was rapidly degraded under hot-hole injection and recovered by sequential hot-electron stress. The Si-SiO2 interface state density was analyzed by a charge pumping technique and the charge pumping current showed the same trend as the threshold voltage shift in degradation process.

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Floating Voltage Stacked LED Driver for Low Voltage Stress and Multi-channel Current Balancing (저 전압스트레스 및 다채널 전류 평형을 위한 Floating 전압 스택형 단일스위치 LED 구동회로)

  • Hwang, Won-Sun;Hwang, Sang-Soo;Kang, Jeong-Il;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.2
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    • pp.122-129
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    • 2015
  • In this study, we propose a low voltage stress and cost-effective light emitting diode (LED) driver capable of multi-channel current balancing. Conventional LED drivers require as many boost converters as the number of LED channels, whereas the proposed LED driver requires only one buck converter and several balancing capacitors instead of several expensive boost converters. Additionally, while the components of the boost converter have high voltage stress and depend on the LED driving voltage, components of the proposed driver have about one-half of the voltage stress across all components. The proposed driver exhibits high reliability and cost effectiveness because it only uses few DC blocking capacitors with no additional active devices to balance the current of multi-channel LEDs. The proposed driver exhibits high reliability and cost effectiveness. The validity of the proposed driver is confirmed through a theoretical analysis. An explanation of the design considerations and experimental results were obtained using a prototype applicable to a 46" LED-TV.

REDUCTION OF VOLTAGE STRESS AND INPUT CURRENT HARMONIC DISTORTION IN SINGLE STAGE PFC CONVERTER BY SELECTIVE VARIABLE FREQUENCY CONTROL (선택적 주파수 변환방식에 의한 단상 역률보상회로의 캐패시터전압 및 입력전류 고조파왜곡의 감소)

  • Choi, Hang-Seok;Lee, Kyu-Chan;Cho, Bo-Hyung
    • Proceedings of the KIEE Conference
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    • 1997.07f
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    • pp.1999-2001
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    • 1997
  • The main two drawbacks of the Sin91e Stage PFC (SS-PFC) converters employing a DCM Boost PFC cell are relatively high voltage stress on the bulk capacitor and the input current harmonic distortion. The high voltage stress on bulk capacitor makes the SS-PFC converter impractical in a universal input application and the input current harmonic distortion lowers power factor. In this paper a selective variable frequency control that reduces the voltage stress on the bulk capacitor and the input current harmonic distortion is proposed. Computer simulation results of the proposed control method are presented.

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Computation of Beam Stress and RF Performance of a Thin Film Based Q-Band Optimized RF MEMS Switch

  • Singh, Tejinder
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.4
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    • pp.173-178
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    • 2015
  • In lieu of the excellent radio frequency (RF) performance of microelectromechanical system ( MEMS) switches, these micro switches need higher actuation voltage for their operation. This requirement is secondary to concerns over the swtiches’ reliability. This paper reports high reliability operation of RF MEMS switches with low voltage requirements. The proposed switch is optimised to perform in the Q-band, which results in actuation voltage of just 16.4 V. The mechanical stress gradient in the thin micro membrane is computed by simulating von Mises stress in a multi-physics environment that results in 90.4 MPa stress. The computed spring constant for the membrane is 3.02 N/m. The switch results in excellent RF performance with simulated isolation of above 38 dB, insertion loss of less than 0.35 dB and return loss of above 30 dB in the Q-band.