• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.961_962
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• 2009

A novel, two-inductor, interleaved power-factor-corrected (PFC) boost converter that exhibits voltage-doubler characteristic when it operates with a duty cycle greater than 0.5 is introduced. The voltage-doubler characteristic of the proposed converter makes it quite suitable for universal-line (90~265VRMS) PFC applications. Because the proposed PFC boost rectifier operates as a voltage doubler at low line, its low-line range efficiency is greatly improved compared to that of its conventional counterpart. The performance of the proposed PFC rectifier was evaluated on an experimental 300W PFC prototype.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.39-42
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• 2006

a current stress reduction technique for a boost integrated half-bridge (BIHB) DC/DC converter with voltage doubler type rectifier is proposed for digital car audio amplifier application. In the proposed circuit, two external capacitors are added parallel to the rectifier diodes in the secondary side of the transformer to shape the primary and the secondary current like rectangular waveforms in every switching instance. The experimental results of a 200W industrial sample show that the peak primary current decreases about by 10A. Thus, the proposed technique shows improved high efficiency.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.5
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• pp.43-50
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• 2002

To improve the current waveform of diode rectifiers, we propose a new operating principle for the voltage -doubler diode rectifiers. In the conventional voltage-doubler rectifier circuit, relatively large capacitors are used to boost the output voltage, while the proposed circuit uses smaller ones and a small reactor not to boost the output voltage but improve the input current waveform. A high input power factor of 97[%] and an efficiency of 98[%] are also obtained. The harmonic guide lines of proposed rectifier is no interfered with inverter switching, resulting in a simple, reliable and low-cost ac-to dc converters in comparison with the boost-type current-improving circuits.It compared conventional pulse-widthmodulated(PWM)inverter with half pulse-widthmodulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switchingloss and holding over-shooting.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.51 no.10
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• pp.581-586
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• 2002

To improve the current waveform of diode rectifiers, we propose a new operating principle for the voltage-doubler diode rectifiers. In the conventional voltage-doubler rectifier circuit, relatively large capacitors are used to boost the output voltage, while the proposed circuit uses smaller ones and a small reactor not to boost the output voltage but improve the input current waveform. A circuit design method is shown by experimentation and confirmed simulation. The experimental results of the proposed diode rectifier satisfies the harmonic guide lines. A high input power factor of 97(%) and an efficiency of 98[%] are also obtained. The new rectifier with no controlled switches meet the harmonic guide lines, resulting in a simple, reliable and low-cost at-to dc converters in comparison with the boost-type current-improving circuits. This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage. And this paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit is constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is, it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduction and the power factor improvement. Half pulse-width modulated (HPWM) inverter was explained compared with conventional pulse width modulated(PWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Journal of Power Electronics
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• v.12 no.4
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• pp.623-631
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• 2012

In this paper, a digital controller design procedure is presented for single-phase voltage-doubler boost rectifiers (VDBR). The model derivation of the single-phase VDBR is performed in the s-domain. After that the simplified equivalent z-domain models are derived. These z-domain models are utilized to design the input current and the output dc-link voltage controllers. For the controller design in the z-domain, the traditional K-factor method is modified by considering the nature of the digital controller. The frequency pre-warping and anti-windup techniques are adapted for the controller design. By using the proposed method, the phase margin and the control bandwidth are accurately achieved as required by controller designers in a practical frequency range. The proposed method is applied to a 2.5 kVA single-phase VDBR for Uninterruptible Power Supply (UPS) applications. From the simulation and the experimental results, the effectiveness of the proposed design method has been verified.

• Journal of Power Electronics
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• v.18 no.1
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• pp.34-44
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• 2018

This paper presents a pulse-width adjustment (PWA) strategy for a novel bidirectional DC-DC boost converter to improve the performance of the dynamic inductor current response. This novel converter consists of three main components: a full-bridge converter (FBC), a high-frequency isolated transformer with large leakage inductance, and a three-level voltage-doubler rectifier (VDR). A number of scholars have analyzed the principles, such as the soft-switching performance and high-efficiency characteristic, of this converter based on pulse-width modulation plus phase-shift (PPS) control. It turns out that this converter is suitable for energy storage applications and exhibits good performance. However, the dynamic inductor current response processes of control variable adjustment is not analyzed in this converter. In fact, dc component may occur in the inductor current during its dynamic response process, which can influence the stability and reliability of the converter system. The dynamic responses under different operating modes of a conventional feedforward control are discussed in this paper. And a PWA strategy is proposed to enhance the dynamic inductor current response performance of the converter. This paper gives a detailed design and implementation of the PWA strategy. The proposed strategy is verified through a series of simulation and experimental results.

• Proceedings of the KIPE Conference
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• 2010.11a
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• pp.188-189
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• 2010

This paper proposed a new zero-voltage switching(ZVS) Two-Inductor boost converter. The conventional Two-Inductor boost converter has defect. When the switch is turned off, the high voltage spike is occurred in the switch by leakage inductance and switch parasitic capacitor. To solve this problem, the parallel resonant capacitor is added to the conventional Two-Inductor boost converter. Using quasi-resonant between parallel resonant capacitance and leakage inductance, the switches is operated soft switching. A reduction of transformer turn ratio is achieved by the voltage doubler rectifier.

• Journal of Power Electronics
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• v.12 no.3
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• pp.377-386
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• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.