• Title/Summary/Keyword: Voltage Gain

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Enhanced Dynamic Response of SRF-PLL System for High Dynamic Performance during Voltage Disturbance

  • Choi, Hyeong-Jin;Song, Seung-Ho;Jeong, Seung-Gi;Choi, Ju-Yeop;Choy, Ick
    • Journal of Power Electronics
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    • v.11 no.3
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    • pp.369-374
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    • 2011
  • Usually, a LPF (low pass filter) is used in the feedback loop of a SRF (synchronous reference frame) - PLL (phase locked loop) system because the measured grid voltage contains harmonic distortions and sensor noises. In this paper, it is shown that the cut-off frequency of the LPF should be designed to suppress the harmonic ripples contained in the measured voltage. Also, a new design method for the loop gain of the PI-type controller in the SRF-PLL is proposed with consideration of the dynamics of the LPF. As a result, a better transient response can be obtained with the proposed design method. The LPF frequency and the PI controller gain are designed in coordination according to the steady state and dynamic performance requirements. Furthermore, in the proposed method, the controller gain and the LPF cut-off frequency are changed from their normal value to a transient value when a voltage disturbance is detected. This paper shows the feasibility and usefulness of the proposed methods through the computer simulations and experimental results.

Output AC Voltage Control of a Three-Phase Z-Source Inverter by the Voltage Gain and Modulation Index Control (전압 이득과 변조지수 제어에 의한 3상 Z-소스 인버터의 출력 교류 전압 제어)

  • Kim, Se-Jin;Jung, Young-Gook;Lim, Young-Cheol;Yang, Seung-Hak
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.11
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    • pp.1996-2005
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    • 2010
  • This paper proposes a new method for constant control of the output AC voltage of a voltage-fed three phase Z-source inverter (ZSI), in case of Z-network DC voltage variation or heavy change of load. The modulation index for the reference output AC voltage of ZSI can be calculated by the basic definition of ZSI, the input DC voltage and capacitor voltage of Z-network. And, the output AC voltage of ZSI is controlled by the modified space vector modulation (SVM) with the calculated modulation index. By the proposed method, the modulation index of output AC voltage is closely following in the reference modulation index. The validity of the proposed method is verified using PSIM simulation. In case which the input DC voltage of ZSI is heavily changed from 100[V] to 70[V] (or to 150[V]) and in case which load is changed from $30[\Omega]$ to $10[\Omega]$, we confirmed that the output AC voltage of ZSI is constantly controlled by the proposed method because the modulation index of ZSI is also simultaneously changed. Finally, FFT and %THD of the output voltage and current of ZSI by the proposed method are analyzed.

Hot carrier effects on the performance degradation of sense amplifiers in DRAM (Hot carrier 현상에 의한 DRAM 감지증폭기의 성능저하)

  • 윤병오;장성준;유종근;정운달;박종태
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.433-436
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    • 1998
  • Hot carrier induceed the performance degradation of sense amplifier circuit in DRAM has been measured and analyzed using 0.8.mu.m CMOS process. Simulation and experimental results show that the degradation of the MOS devices affects the decrease of the half-Vcc, voltage gain and the increase of the sensing voltage gain and the increase of the sensing voltage. The dominant degradation mechanism is the capacitance imblance in the bit-line pair. We carried out the spice simulation to investigate the degradation of the sense amplifier circuit.

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Dual-Coupled Inductor High Gain DC/DC Converter with Ripple Absorption Circuit

  • Yang, Jie;Yu, Dongsheng;Alkahtani, Mohammed;Yuan, Ligen;Zhou, Zhi;Zhu, Hong;Chiemeka, Maxwell
    • Journal of Power Electronics
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    • v.19 no.6
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    • pp.1366-1379
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    • 2019
  • High-gain DC/DC converters have become one of the key technologies for the grid-connected operation of new energy power generation, and its research provides a significant impetus for the rapid development of new energy power generation. Inspired by the transformer effect and the ripple-suppressed ability of a coupled inductor, a double-coupled inductor high gain DC/DC converter with a ripple absorption circuit is proposed in this paper. By integrating the diode-capacitor voltage multiplying unit into the quadratic Boost converter and assembling the independent inductor into the magnetic core of structure coupled inductors, the adjustable range of the voltage gain can be effectively extended and the limit on duty ratio can be avoided. In addition, the volume of the magnetic element can be reduced. Very small ripples of input current can be obtained by the ripple absorption circuit, which is composed of an auxiliary inductor and a capacitor. The leakage inductance loss can be recovered to the load in a switching period, and the switching-off voltage spikes caused by leakage inductance can be suppressed by absorption in the diode-capacitor voltage multiplying unit. On the basis of the theoretical analysis, the feasibility of the proposed converter is verified by test results obtained by simulations and an experimental prototype.

Design of a 1~10 GHz High Gain Current Reused Low Noise Amplifier in 0.18 ㎛ CMOS Technology

  • Seong, Nack-Gyun;Jang, Yo-Han;Choi, Jae-Hoon
    • Journal of electromagnetic engineering and science
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    • v.11 no.1
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    • pp.27-33
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    • 2011
  • In this paper, we propose a high gain, current reused ultra wideband (UWB) low noise amplifier (LNA) that uses TSMC 0.18 ${\mu}m$ CMOS technology. To satisfy the wide input matching and high voltage gain requirements with low power consumption, a resistive current reused technique is utilized in the first stage. A ${\pi}$-type LC network is adopted in the second stage to achieve sufficient gain over the entire frequency band. The proposed UWB LNA has a voltage gain of 12.9~18.1 dB and a noise figure (NF) of 4.05~6.21 dB over the frequency band of interest (1~10 GHz). The total power consumption of the proposed UWB LNA is 10.1 mW from a 1.4 V supply voltage, and the chip area is $0.95{\times}0.9$ mm.

A 1.5V CMOS High Frequency Operational Amplifier for High Frequency Signal Processing Systems. (고주파 신호처리 시스템을 위한 1.5V CMOS 고주파 연산증폭기)

  • 박광민;김은성;김두용
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.1117-1120
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    • 2003
  • In this paper, a 1.5V CMOS high frequency operational amplifier for high frequency signal processing systems is presented. For obtaining the high gain and the high unity gain frequency with the 1.5V supply voltage, the op-amp is designed with simple two stages which are consisting of the rail-to-rail differential input stage and the class-AB output stage. The designed op-amp operates with the 1.5V supply voltage, and shows well the push-pull class-AB operation. The simulation results show the DC open loop gain of 77dB and the unity gain frequency of 100MHz for the 1㏁ ┃ 10pF load. When the resistive load R$_1$. is varied from 1㏁ to 1 ㏀, the DC open loop gain decreases by only 4dB.

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Control of the Z-Source Inverter using Average Model (평균 모델을 이용한 Z-소스 인버터의 제어)

  • Lee, Kwang-Woon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.19 no.3
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    • pp.290-296
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    • 2014
  • This paper presents a design strategy for the control of the Z-source inverter (ZSI). For the Z-network capacitor voltage control, the average current model is derived to describe the dynamics of the voltage control and the controller outputs the average current command for the capacitor. Z-network inductor current reference is derived from the average current model of the Z-network capacitor. The inner current control loop outputs the average voltage command for the Z-network inductor and the shoot-through duty ratio of the ZSI is calculated from the output using the average voltage model of the Z-network inductor. The gain values of the current and voltage controllers are directly obtained by the Z-network parameters and desired bandwidth of each controller without a gain tuning process.

A Gate-Leakage Insensitive 0.7-V 233-nW ECG Amplifier using Non-Feedback PMOS Pseudo-Resistors in 0.13-μm N-well CMOS

  • Um, Ji-Yong;Sim, Jae-Yoon;Park, Hong-June
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.4
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    • pp.309-315
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    • 2010
  • A fully-differential low-voltage low-power electrocardiogram (ECG) amplifier by using the nonfeedback PMOS pseudo-resistors is proposed. It consists of two operational-transconductance amplifiers (OTA) in series (a preamplifier and a variable-gain amplifier). To make it insensitive to the gate leakage current of the OTA input transistor, the feedback pseudo-resistor of the conventional ECG amplifier is moved to input branch between the OP amp summing node and the DC reference voltage. Also, an OTA circuit with a Gm boosting block without reducing the output resistance (Ro) is proposed to maximize the OTA DC gain. The measurements shows the frequency bandwidth from 7 Hz to 480 Hz, the midband gain programmable from 48.7 dB to 59.5 dB, the total harmonic distortion (THD) less than 1.21% with a full voltage swing, and the power consumption of 233 nW in a 0.13 ${\mu}m$ CMOS process at the supply voltage of 0.7 V.

A Design of Analog Voltage-controlled Tunable Active Element for Information Protection (정보 보호용 아날로그 전압조절 가변 능동소자 설계)

  • 송제호;방준호
    • Journal of the Korea Computer Industry Society
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    • v.2 no.10
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    • pp.1253-1260
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    • 2001
  • In this paper, a new voltage-controlled tunable analog active element for low-voltage applications and information protection is proposed. The proposed active element is composed of the CMOS complementary cascode circuit which can extend transconductance of an element. Therefore, the unity gain frequency which is determined transconductance is increased than that of the conventional element. And then these results are verified by the $0.25\mutextrm{m}$ CMOS n-well parameter HSPICE simulation. As a result, the gain and the unity gain frequency are 42㏈ and 200MHz respectively in the element on 2V supply voltage. And power dissipation of the designed circuit is 0.32mW.

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Design of Mixer using Neutralization Technique (Neutralization을 이용한 주파수 변환기 설계)

  • Choi, Moon-Ho;Choi, Won-Ho;Kim, Yeong-Seuk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.4
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    • pp.311-320
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    • 2008
  • In this paper, a 2.4 GHz low-voltage CMOS double-balanced down-conversion mixer using neutralization technique has been proposed and verified by circuit simulations and measurements. The grounded source structure was used for low-voltage operation. The neutralization technique was used to improve a conversion gain. The proposed mixer is fabricated in $0.25{\mu}m$ CMOS process for a 2.4 GHz wireless receiver. The mixer consumes 1.94 mW and gives conversion gain of 5.66 dB, input IP3 of 0.7 dBm and P1dB of -11.2 dBm at 1.5 V power supply. Measured results for the designed mixer show improved conversion gain of 2.86 dB over conventional mixer of grounded source structure.