• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.75-80
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• 1994

AlAs/GaAs/AlAs RTDs(Resonant Tunneling Diodes) are fabricated and current-voltage properties of them are measured. At room temperature, peak to valley ratio is 2.4 NOT.AND.OR logic gates and Flip-Flop are fabricated using the bistable characteristics of RTDs. Although NOT.AND.OR logic gates need 5~8 transistors. only one RTD is sufficient to fabricate the logic gates. Since the switching time is very short(<10$^12$sec), it is possible to drive the semiconductor circuits fast and integrate them very large. And it is convinced the possibility of integrating RTDs to multilevel logic circuits by observing two peaks of similar current in the serial connection of two RTDs.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.415-418
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• 2002

In the paper, a four-phase 16/12 structure Switched Reluctance motor drive is presented. The construction of the stator and the rotor in the motor, the scheme of the rotor position detector and the main circuit of the power converter are described. The comparison of the four-phase 16/12 motor and the four-phase 816 motor and the comparison of the four-phase 16/12 motor and the three-phase 12/8 motor are made. In the controller, the PWM control variable-speed control, the commutation control, the four quadrants control, the overvoltage protection, the overcurrent protection and the under voltage protection could be achieved. Tested results of the developed prototype are made.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.148-150
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• 1988

The output characteristics of VSI by transistor depend upon bias signal with drive circuit. As the CTI is one of the VSI, takes case PWM output voltage. This Inverter operation is based upon position and negative of sinusoldal PWM signal by carrier triangular wave and compared sine one. Besides, the Inverter operation system required digital signal for microprocessor, sampling method of Inverter driver signals study for get rid of generated signal is error. In the paper, the method of 3 level PWM signal for CTI was studied. This method of signals depend upon caculated switching position of natural sampling with $10^{-6}$ modulation error for time flowchart programs.

• 전기의세계
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• v.25 no.4
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• pp.68-72
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• 1976

This study is initiated to solve the problem that the development of an electric machine to drive heavy horse-power load required in the rural district, where only single phase supply is available, is very urgent. As a method for this purpose, the single/three phase converter by single phase induction machine with a tapped auxiliary winding, running unloaded mechanically under single-phase source and supplying three-phase output to a loaded 3-phase induction motor, is devised and the pilot machine is put into test. Analysis based on hybrid equivalent circuit for the phase converter and symmertical component theory for the 3-phase load motor and practical experiment result in that optimum auxiliary winding ratio is to be 1.25 rather than theoretical .root.3/2 in order to keep the voltage unbalance ratio of 3-phase output from the converter as low as possible in both cases of starting and running the load motor.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.2142-2144
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• 1998

We proposed the speed control of the SLIM(Single-sided Linear Induction Motor) for conveyance system by the decoupled thrust control. The voltage equations of SLIM are expressed on the suitable $\alpha-\beta$ axis by the proposed equivalent circuit, which can analyze the characteristics of the thrust and the normal force and so on. These control methods, which are the slip angular frequency control and the decoupling control for the thrust and normal force by analyzing these parameters can be successfully driven without interfering of each axis. These results exemplified the linear drive of SLIM with the reference value.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1390-1393
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• 2002

Comparative analysis of driving inverters for piezo-electric transformer (PT) is performed and the suit- able drive circuit for portable devices such as personal digital assistants (PDA) is chosen with the experiment in this paper. As a result, a single-switch inverter with a small two winding reactor is chosen, and then the advantages of this method are clarified. It is also confirmed that the driving inverter with this method enables to realize a stabilized AC 400v output and 82% power efficiency from DC 3V input under the conditions of the variations of load current or input voltage from the experiments. Piezo-electric Transformer, Back-Light System, Single-Switch Driving Circuits, Control Method

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.3
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• pp.397-408
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• 1994

In this paper, a novel concept for a static three-phase to three-phase power converter for an AC drive with a unity power factor and reduced harmonics on the utility line is presented. The power circuit consists of two back-to-back connected six-pulse bridges having only a $\mu$F ceramic capacitor in the DC link. By controlling the active kpower balance between two bridges, the DC link voltage can be maintained within 20V deviation from the nominal value with the small ceramic capacitors regardless of the load variation even in the unbalanced source condition.

• Journal of Information Display
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• v.12 no.1
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• pp.61-67
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• 2011

A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31" WVGA ($800{\times}480$) LCD panel, and the fabricated circuits were verified via simulations and measurements.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.362-371
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• 2018

This work proposes FPGA implementation of Carrier Disposition PWM for closed loop seven level diode clamped multilevel inverter in speed control of induction motor. VLSI architecture for carrier Disposition have been introduced through which PWM signals are fed to the neutral point seven level diode clamped multilevel using which the speed of the induction motor is controlled. This proposed VLSI architecture makes the power circuit to work better with reduced stresses across the switches and a very low voltage and current total harmonic distortion (THD). The output voltages, currents, torque & speed characteristics for seven level neutral point diode clamped multilevel inverter for AC drive was studied. It has observed the proposed scheme introduces less distortion and harmonics. The results were validated using real time results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.12 no.1
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• pp.117-125
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• 1998

In this paper, in order to develop the three phase GTO CSI of high efficiency 1M drive with low loss commutation and snubber energy, we studied the energy recovery circuit to recover stored energy in clamping capacitor and DC link inductor(VCC-l and VCC-2), and snubber capacitor(VCC-3). By using an induction motor as the load of inverter, experimental results show that dissipated DC power is decreased and capacitor voltage Vc is effectively suppressed by VCC-2 and VCC-3 system, and the validity of VCC-3 system with low loss commutation and snubber energy is proofed.roofed.