• Title/Summary/Keyword: Voltage Division

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The Compensation of Pixel Voltage Error for a-Si TFT LCDs Regarding the Input Gamma Voltage

  • Kang, Seung-Jae;Lee, Jun-Pyo;Park, Young-Bae;Moon, Hoi-Sik;Kong, Hyang-Shik;Kim, Kyung-Seop;Kim, Sang-Su;Kim, Su-Ki
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.560-562
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    • 2002
  • The liquid crystal(LC) pixel capacitance Clc, which varies as a function of applied pixel voltage, is a main factor of pixel voltage errors on input gamma voltage, and therefore of the electro-optics(E-O) characteristics of LC pixel for a-Si TFT LCDs. The pixel voltage error(${\Delta}$Vp) for input gamma voltage was simulated for 14.1 inch diagonal XGA panel. An agreement between the experimental results and simulation was satisfactory for the gamma voltage compensation, ${\Delta}$Vp of the input gamma voltage. The proposed compensation method was successfully introduced to a 14.1 inch diagonal XGA panel, and a remarkable improvement of image sticking was achived.

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A Study on about Implementation to Induction Cooker that load Turbo Inverter algorithm

  • Lee Min-Ki;Koh Kang-Hoon;Kwon Soon-Kurl;Lee Hyun-Woo;nakaoka M.
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.136-139
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    • 2001
  • The voltage resonating inverter has a defect in the switching element that works at 5 or 6 times higher than input voltage. Especially, it is very difficult to choose very high switching device for the 220[V]commercial voltage. In this paper, it is proposed the optimum method to realize the turbo 2000[W] power for induction cooker that is employed the 900[V] IGBT with decreasing operating voltage of the switching component by making the 220[V], 1500[W] inverter through the clamp mode voltage resonating inverter.

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Design and Application of a Ground Risk Voltage Measurement System (대지 위험전압 측정기의 설계 및 적용)

  • Jang, Un-Yong;Cha, Hyeon-Kyu;Cha, Sang-Wook;Park, Dae-Won;Kil, Gyung-Suk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.3
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    • pp.250-255
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    • 2011
  • This paper dealt with the design, fabrication and application of a risk voltage measurement system (RVMS) which analyzes the step and touch voltages in electrical grounding systems. The RVMS supply 300 V and 1.4 A in ranges from 40 Hz to 1 kHz as the test power source. A DAQ module having resolution of 400 kS/s and 16 bit is equipped with 7 inputs for measuring voltage and current. Also, a noise elimination algorithm of digital filter was applied to reduce the measurement error caused by external noises as a commercial frequency current. The performance of the RVMS was evaluated by measurement of the step and touch voltage according to the IEEE standard 80 and 81 in a grounding system with a 10 m counterpoise. The result showed that the RVMS analyzes the risk voltage with the error below 5%.

Preparation of Alumina-Silica Composite Coatings by Electrophoretic Deposition and their Electric Insulation Properties (EPD 방법을 이용한 알루미나-실리카 복합 코팅막의 제조와 전기절연 특성)

  • Ji, Hye;Kim, Doo Hwan;Park, Hee Jeong;Lim, Hyung Mi;Lee, Seung-Ho;Kim, Dae Sung;Kim, Younghee
    • Journal of the Korean Ceramic Society
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    • v.51 no.3
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    • pp.177-183
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    • 2014
  • Alumina-silica composite coating layers were prepared by electrophoretic deposition (EPD) of plate-shaped alumina particles dispersed in a sol-gel binder, which was prepared by hydrolysis and the condensation reaction of methyltrimethoxysilane in the presence of colloidal silica. The microstructure and the electrical and thermal properties of the coatings were compared according to the EPD process parameter: voltage, time and the content of the plate-shaped alumina particles. The electrical insulation property of the coatings was measured by a voltage test. The coatings were prepared by EPD of the sol-gel binder with 5-30 wt% plate alumina particles on parallel electrodes at a distance of 2 cm for 1-10 min under an applied voltage of 10-30 V. The coatings experienced increased breakdown voltage with increasing thickness. However, the higher the thickness was, the smaller the breakdown voltage strength was. A breakdown voltage as high as 4.6 kV was observed with a $400{\mu}m$ thickness, and a breakdown voltage strength as high as 27 kV/mm was achieved for the sample under a $100{\mu}m$ thickness.

An a-Si:H TFT Pixel Circuit with Novel Threshold Voltage Compensation Technique for AMOLED Displays

  • Shin, Min-Seok;Min, Ung-Gyu;Choi, Jung-Hwan;Song, Jun-Yong;Lee, Seung-Yong;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1697-1700
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    • 2006
  • A Novel pixel structure with a new threshold voltage compensation technique is proposed for large-size a-Si:H AMOLED panel application. The proposed pixel improves image quality with threshold voltage compensation and alleviates annealing technique for display-off time. Sensing the threshold voltage of driving TFT for 20-inch WUXGA panel is verified by the HSPICE simulation.

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Approaches to Suppressing Shaft Voltage in Non-Insulated Rotor Brushless DC Motor driven by PWM Inverter

  • Isomura, Yoshinori;Yamamoto, Kichiro;Morimoto, Shigeo;Maetani, Tatsuo;Watanabe, Akihiko;Nakano, Keisaku
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.3
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    • pp.241-247
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    • 2014
  • The voltage source PWM inverter generally used to drive the air conditioning (A/C) fans has been posing a large issue that the bearings in air conditioning fan motors are highly possible to be corroded electrically. Potential difference called shaft voltage is generated between inner and outer rings of the bearings due to inverter switching. The shaft voltage causes bearing lubricant breakdown dielectrically. As a result, bearing current is caused. This current causes the bearing corrosion. In previous work, we demonstrated that the shaft voltage can be reduced by using an insulator inserted between the outer and inner cores of the rotor in an air conditioning fan motor without grounding. This paper proposes the other countermeasure for reducing the shaft voltage in fan motors. The countermeasure which adds a capacitor between the brackets and the stator core is effective even for fan motors with non-insulated rotor. The effectiveness is confirmed by both simulated and experimental results.

Design of Charge Pump with High Pumping Gain (높은 펌핑 이득을 갖는 저전압 차지 펌프 설계)

  • Choi Dong-Kwon;Shin Yoon-Jae;Cui Xiang-Hwa;Kwack Kae-Dal
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.473-476
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    • 2004
  • AS supply voltage of DRAM is scaled down, voltage circuit that is stable from external noise is more important. $V_{PP}$ voltage is very important, it is biased to gate of memory cell transistor and possible to read and write without voltage down. It has both high pump gain and high power efficiency therefore charge pump circuit is proposed. The circuit is simulated by 0.18${\mu}m$ memory process and 1.2V supply voltage. Compare to CCTS, it is improved 0.43V of pump gain, $3.06\%$ of power efficiency at 6 stage.

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Single Stage Power Factor Correction Using A New Zero-Voltage-Transition Isolated Full Bridge PWM Boost Converter

  • Jeong, Chang.-Y.;Cho, Jung-G.;Baek, Ju-W.;Song, Du-I.;Yoo, Dong-W.
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.694-700
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    • 1998
  • A novel zero-voltage-transition (ZVT) isolated PWM boost converter for single stage power factor correction (PFC) is presented to improve the performance of the previously presented ZVT converter[8]. A simple auxiliary circuit which includes only one active switch provides zero-voltage-switching (ZVS) condition to all semiconductor devices. (Two active switches are required for the previous ZVT converter) This leads to reduced cost and simplified control circuit comparing to the previous ZVT converter. The ZVS is achieved for wide line and load ranges with minimum device voltage and current stresses. Operation principle, control strategy and features of the proposed converter are presented and verified by the experimental results from a 1.5 kW, 100 KHz laboratory prototype.

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A Word Line Ramping Technique to Suppress the Program Disturbance of NAND Flash Memory

  • Lee, Jin-Wook;Lee, Yeong-Taek;Taehee Cho;Lee, Seungjae;Kim, Dong-Hwan;Wook-Ghee, Hahn;Lim, Young-Ho;Suh, Kang-Deog
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.1 no.2
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    • pp.125-131
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    • 2001
  • When the program voltage is applied to a word line, a part of the boosted channel charge in inhibited bit lines is lost due to the coupling between the string select line (SSL) and the adjacent word line. This phenomenon causes the program disturbance in the cells connected to the inhibited bit lines. This program disturbance becomes more serious, as the word line pitch is decreased. To reduce the word line coupling, the rising edge of the word-line voltage waveform was changed from a pulse step into a ramp waveform with a controlled slope. The word-line ramping circuit was composed of a timer, a decoder, a 8 b D/A converter, a comparator, and a high voltage switch pump (HVSP). The ramping voltage was generated by using a stepping waveform. The rising time and the stepping number of the word-line voltage for programming were set to $\mutextrm{m}-$ and 8, respectively,. The ramping circuit was used in a 512Mb NAND flash memory fabricated with a $0.15-\mutextrm{m}$ CMOS technology, reducing the SSL coupling voltage from 1.4V into a value below 0.4V.

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