• 조명전기설비학회논문지
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• 제26권6호
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• pp.16-28
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• 2012

This paper proposes a quasi Z-source converter(QZSC) with a diode-capacitor output filter to improve the output DC voltage boost ability. The proposed converter has the same quasi Z-source network topology compared with the conventional converter. But the proposed method is adopted a diode-capacitor filter as its output filter, since the conventional method is used an inductor-capacitor as its output filter. Under the condition of the same input-output DC voltage, the proposed method has more lower shoot-through duty ratio than the conventional method. Also, because the proposed converter has same voltage boost factor under lower shoot-through duty ratio compared with the conventional converter, the proposed converter can be operated with the lower capacitor voltage of Z-source network and the lower input current. To confirm the validity of the proposed method, PSIM simulation and a DSP based experiment were performed to acquire the output DC voltage 120[V] under the input DC voltage 80[V]. And the capacitor voltage and inductor current in Z-source network, the output voltage of each converter were compared and discussed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 A
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• pp.25-27
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• 2002

This paper describes a new economical voltage sag and swell generator suitable to the evaluations of high power custom power devices such as DVR (Dynamic Voltage Restorer) and DSTATCOM (Distribution Static Compensator). This system was designed to generate the several power quality disturbances in MVA power ratings - voltage sag and swell, under voltage, over voltage and harmonic distortions. The basic idea for voltage sag and swell is to use the voltage drop across a reactor, while the voltage swell is to use the step-up transformer and the TCR(Thyristor Controlled Reactor). In this paper, two identical 3 phase TCRs and a step-up transformer with tap changer are used. Additional harmonic filters are added to reduce the voltage distortion when TCRs are operated. Simulation results are given for several cases of voltage sag and swell generations.

• 수산해양교육연구
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• 제28권6호
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• pp.1591-1601
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• 2016

In recent years most of large-sized merchant ships have been equipped with a high-voltage system. The ships demanding a lot of electric power adopt the high voltage such as 3.3kV, 6.6kV, 11kV. Gradually as the high voltage system is increased in the ships, engineering officers are more opportunities to operate the high voltage system. So the high voltage training for engineering officers was established in the STCW 1978 as amended by the Manila Amendments in 2010. According to this convention when the engineering officers want to board the high voltage ships on and after January 1 in 2017, they must take the high voltage training. This paper, firstly, analyzes the content of high voltage training in STCW convention and IMO model course. In addition, it reviews the parts need to be considered in the content of the high voltage training. Finally this paper proposes the contents of training model divided into theory and practice.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.60-67
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• 2018

The presence of induction motor loads in a power system may cause the phenomenon of delayed voltage recovery after the occurrence of a severe fault. A high proportion of induction motor loads in the power system can be a significant influence on the voltage stability of the system. This problem referred to as FIDVR(Fault Induced Delayed Voltage Recovery) is commonly caused by stall of small HVAC unit(Heating, Ventilation, and Air Conditioner) after transmission or distribution system failure. This delayed voltage recovery arises from the dynamic characteristics associated with the kinetic energy of the induction motor load. This paper proposes the UVLS (Under Voltage Load Shedding) control strategy for dealing with FIDVR. UVLS based schemes prevent voltage instability by shedding the load and can help avoid major economic losses due to wide-ranging cascading outages. This paper review recent topic about under voltage load shedding and compare decentralized load shedding scheme with conventional load shedding scheme. The load shedding strategy is applied to an actual system in order to verify the proposed FIDVR mitigation solution. Simulations demonstrate the effectiveness of the proposed method in resolving the problem of delayed voltage recovery in the Korean Power System.

• Journal of Power Electronics
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• 제15권2호
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• pp.504-517
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• 2015

This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.

• Journal of Power Electronics
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• 제17권4호
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• pp.1088-1096
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• 2017

Load variations on a distribution line result in voltage fluctuations at the point of common coupling (PCC). In order to keep the magnitude of the PCC voltage constant at its rated value and obtain zero voltage regulation (ZVR), a D-STATCOM is installed for voltage correction. Moreover, the ZVR mode of a D-STATCOM can also be used to balance the source current during unbalanced loading. For medium voltage and high power applications, a D-STATCOM is realized by the cascaded H-bridge topology. In the ZVR mode, the D-STATCOM may draw unbalanced current and in this process is required to handle different phase powers leading to deviations in the cluster voltages. Zero sequence voltage needs to be injected for ZVR mode, which creates circulating power among the phases of the D-STATCOM. The computed zero sequence voltage and the individual DC capacitor balancing controller help the DC cluster voltage follow the reference voltage. The effectiveness of the control scheme is verified by modeling the system in MATLAB/SIMULINK. The obtained simulations are further validated by the experimental results using a dSPACE DS1106 and five-level D-STATCOM experimental set up.

• Journal of Power Electronics
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• 제19권6호
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• pp.1496-1504
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• 2019

This paper proposes a new THD reduction algorithm for modular multilevel converters (MMCs) with offset voltage injection operated in nearest level modulation (NLM). High voltage direct current (HVDC) is actively introduced to the grid connection of offshore wind powers, and this paper deals with a voltage generation technique with an MMC for wind power generation. In the proposed method, third harmonic voltage is added for reducing the THD. The third harmonic voltage is adjusted so that each of the pole voltage magnitudes maintains a constant value with a maximum number of (N+1) levels, where N is the number of sub-modules per arm. By using the proposed method, the THD of the output voltage is mitigated without increasing the switching frequency. In addition, the proposed method has advantageous characteristics such as simple implementation. As a part of this study, this paper compares the THD results of the conventional method and the proposed method with offset voltage injection to reduce the THD. In this paper, simulations have been carried out to verify the effectiveness of the proposed scheme, and the proposed method is implemented by a HILS (Hardware in the Loop Simulation) system. The obtained results show agreement with the simulation results. It is confirmed that the new scheme achieved the maximum level output voltage and improved the THD quality.

• 한국전기전자재료학회논문지
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• 제36권2호
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• pp.129-135
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• 2023

An analytical threshold voltage model is presented to observe the change in threshold voltage shift ΔV_th of a junctionless double gate MOSFET using ferroelectric-metal-SiO₂ as a gate oxide film. The negative capacitance transistors using ferroelectric have the characteristics of increasing on-current and lowering off-current. The change in the threshold voltage of the transistor affects the power dissipation. Therefore, the change in the threshold voltage as a function of theferroelectric thickness is analyzed. The presented threshold voltage model is in a good agreement with the results of TCAD. As a results of our analysis using this analytical threshold voltage model, the change in the threshold voltage with respect to the change in the ferroelectric thickness showed that the threshold voltage increased with the increase of the absolute value of charges in the employed ferroelectric. This suggests that it is possible to obtain an optimum ferroelectric thickness at which the threshold voltage shift becomes 0 V by the voltage across the ferroelectric even when the channel length is reduced. It was also found that the ferroelectric thickness increased as the silicon thickness increased when the channel length was less than 30 nm, but the ferroelectric thickness decreased as the silicon thickness increased when the channel length was 30 nm or more in order to satisfy ΔV_th=0.

• 전기학회논문지
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• 제61권2호
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• pp.199-208
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• 2012

This paper proposes a quasi Z-source DVR(Dynamic Voltage Restorer) system with a series connection of the output terminals, to compensate the voltage variations in the 6.6[kV]/60[Hz] power distribution system. The conventional DVR using one quasi Z-source AC-AC converter has the advantage which it can compensate the voltage variations without the need for the additional energy storage device such as a battery, but it is impossible to compensate for the 50[%] under voltage sags. To solve this problem, a DVR system using two quasi Z-source AC-AC converters with the series connection of the output terminals is proposed. By controlling the duty ratio D in the buck-boost mode, the proposed system can control the compensation voltage. For case verification of the proposed system, PSIM simulation is achieved. As a result, in case that the voltage sags-swells occur 10[%], 20[%], 60[%] in power distribution system, and, in case that the 50[%] under voltage sags-swells continuously occur, all case could compensate by the proposed system. Especially, the compensated voltage THD was examined under the condition of the 10[%]~50[%] voltage sags and the 20[${\Omega}$]~100[${\Omega}$] load changes. The compensated voltage THD was worse for the higher load resistances and more severe voltage sags. Finally, In case of the voltage swells compensation, the compensation factor has approached nearly 1 regardless of the load resistance changes, while the compensation factor of voltage sags was related to the load variations.

• 전력전자학회논문지
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• 제17권4호
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• pp.306-314
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• 2012

In case of the conventional DC-AC inverter using two DC-DC converters with unipolar output capacitor voltages, for generating the AC output voltage, the output capacitor voltages of its each DC-DC converter must be higher than the DC input voltage. To solve this problem, this paper proposes a single-phase DC-AC inverter using two embedded Z-source converters with bipolar output capacitor voltages. The proposed inverter is composed of two embedded Z-source converters with common DC source and output AC load. The AC output voltage is obtained by the difference of the output capacitor voltages of each converter. Though the output capacitor voltage of converter is relatively low compared to the conventional method, it can be obtained the same AC output voltage. Moreover, by controlling asymmetrically the output capacitor voltage, the AC output voltage of the proposed system is higher than the DC input voltage. To verify the validity of the proposed system, a DSP(TMS320F28335) based single-phase embedded Z-source DC-AC inverter was made and the PSIM simulation was performed under the condition of the DC source 38V. As controlled symmetrically and asymmetrically the output capacitor voltages of each converter, the proposed inverter could produce the AC output voltage with sinusoidal waveform. Particularly, in case of asymmetric control, a higher AC output voltage was obtained. Finally, the efficiency of the proposed system was measured as 95% and 97% respectively in case of symmetric and asymmetric control.