• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.8
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• pp.1464-1469
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• 2008

A CMOS Gm-C filter with variable cutoff frequency applicable for using in the direct conversion receiver is designed. The designed filter comprises the CMOS differential transconductors, and the gm of the transconductor is controlled by the bias voltage. This configuration can compensate variant of the cutoff frequency which could be generated by external noises, and also be used in multiband receiver. As a results of HSPICE simulation, the control range of the cutoff frequency is $1.5MHz{\sim}3.5MHz$ and the gain control range is $-2.8dB{\sim}2.6dB$. The layout of the designed 5th-order Elliptic low-pass filter is performed to fabricate a chip using $2.5V-0.25{\mu}m$ CMOS processing parameter.

• Journal of Biomedical Engineering Research
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• v.25 no.2
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• pp.137-144
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• 2004

ECG signals are often contaminated with high-frequency noise such as muscle artifact, power line interference, and others. In the ECG signal processing, especially during a pre-processing stage, numerous noise removal techniques have been used to reduce these high-frequency noise without much distorting the original signal. This paper proposes a new type of digital filter with a continuously variable cutoff frequency to improve the signal quality This filter consists of a cutoff frequency controller (CFC) and variable cutoff frequency lowpass filter (VCF-LPF). From the noisy input ECG signal, CFC produces a cutoff frequency control signal using the signal slew rate. We implemented VCF-LPF based on two new filter design methods called convex combination filter (CCF) and weight interpolation fille. (WIF). These two methods allow us to change the cutoff frequency of a lowpass filter In an arbitrary fine step. VCF-LPF shows an excellent noise reduction capability for the entire time segment of ECG excluding the rising and falling edge of a very sharp QRS complex. We found VCF-LPF very useful and practical for better signal visualization and probably for better ECG interpretation. We expect this new digital filter will find its applications especially in a home health management system where the measured ECG signals are easily contaminated with high-frequency noises .

• The Transactions of the Korean Institute of Electrical Engineers
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• v.32 no.12
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• pp.427-434
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• 1983

Singular Value Decomposition of 2-D Finite Impulse Response was used to design a variable cutoff 2-D FIR filters. Basically this approach allows to use 1-D techniques while dealing with 2-D filters. In this paper, our aim is to provide away of easily tuning 2-D FIR filters. For example, one would like to adjust interactively the cutoff frequency of a 2-D Circular Symmetric low-pass filter on an image processing system. The decomposition of 2-D FIR filters along with techniques available for tuning 1-D FIR filters allows such adjustment. Several design examples are shown.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.3
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• pp.455-464
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• 2019

The sensorless control based on the flux linkage of PM synchronous motors has excellent position estimation characteristics at low speeds. However, a limitation arises because the integrator of flux estimator is saturated by the DC offset generated during the analog to digital conversion(ADC) process of the measured current. In order to overcome this limitation, HPF with a low cutoff frequency is used. However, the estimation performance is deteriorated (Ed- the verb deteriorate already includes the meaning of 'problem') at high speed due to the low cutoff frequency, and increasing the cutoff frequency of the HPF induces further problems of phase leading and initial starting failure at low speeds. In this paper, the cutoff frequency of HPF was synchronized to the operation frequency of the motor: at low speeds the cutoff frequency was set to low in order to reduce the phase leading of the estimated flux, and at high speeds it was set to high to raise the DC offset removal performance. As a result, the operating range was increased by 200%. Furthermore, a phase compensation algorithm is proposed to reduce the phase leading of the HPF to less than 1.5 degrees over the full operating range. The proposed sensorless control algorithm was verified by experiment with a PM synchronous motor for a washing machine.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.1C
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• pp.65-73
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• 2006

The purpose of this study is to design and analyze the pre-modulation filter with the variable -3dB cutoff frequency and linear phase response for bandlimiting the allocation of radio frequency bandwidth in PCM/FM transmission system. For the implementation of this required filter, the digital FIR filter, DAC and variable 2nd order LPF have been constructed with the filter block which designed and analyzed by each stage in order to satisfy the attenuation characteristic requirement of the analog 7th order bessel filter. The paper also concerned the linear phase properties for the filter block. Especially we have carried out the linear phase simulation with real parts for variable 2nd order LPF and compared this simulation results with the one of the fixed bandwidth 2nd order bessel filter for validating the linear phase requirement.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.7C
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• pp.713-724
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• 2006

The purpose of this study is to design, implement and verify the pre-modulation filter with the variable -3dB cutoff frequency and linear phase response for bandlimiting the allocation of radio frequency bandwidth for PCM/FM transmission. For the design of this required filter, the digital FIR filter, DAC system and tuneable 2nd order LPF have been constructed and simulated according to the attenuation characteristic requirement of the amplitude frequency response by each stage. From these results, we have implemented the filter and verified the analog conversion hardware part which is composed of DAC system and tuneable 2nd order LPF for the interpolation of the discrete sequences. Especially this paper proposes and carries out the verification processes using the tone generator and the calibration procedures for more precise frequency response of the filter.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.4
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• pp.871-876
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• 2011

In this paper, a voltage-controlled frequency tunable current-mode integrator and a 3rd-order current-mode Chebyshev filter in 1.8V-$0.18{\mu}m$ CMOS is realized for software radio applications in system-on-chips. This filter is used for reconstruction purposes between a current-steering DAC and a current-mode mixer. Power consumption of the designed filter can be reduced by using a current-mode small size integrator. And also, cutoff frequency of this filter is variable between 1.2MHz and 10.1MHz, the power consumption is 2.85mW. And the voltage bias compensated circuit is used to control the voltage variation.in the designed filter.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.8
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• pp.57-62
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• 1993

In this paper, both feasible power gain and power added efficiency at the operating center frequency of 12 GHz are stressed to design a power FET with double-heterjunction structure. The variable parameters or the design are the unit gate width, the gate length, the doping density of AlGaAs, the AlGaAs thickness, the spacer thickness, the Al mole fraction, and the GaAs well thickness. The results of simulation for the FET with 1.mu.m gate length show that the power gain and the power added efficiency are 10.2 dB and 36.3% at 12GHz, respectively. An extrapolation of the relation between current gain and unilateral gain yields a 17 GHz cutoff frequency and 43GHz maximum frequency of oscillation. The calculation of the current versus voltage characteristics show that the output power of the device is about 0.62W.

• ETRI Journal
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• v.26 no.5
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• pp.486-492
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• 2004

The emergence of wide channel bandwidth wireless standards requires the use of a highly linear, wideband integrated CMOS baseband chain with moderate power consumption. In this paper, we present the design of highly linear, wideband active RC filters and a digitally programmable variable gain amplifier. To achieve a high unity gain bandwidth product with moderate power consumption, the feed-forward compensation technique is applied for the design of wideband active RC filters. Measured results from a $0.5{\mu}m$ CMOS prototype baseband chain show a cutoff frequency of 10 MHz, a variable gain range of 33 dB, an in-band IIP3 of 13 dBV, and an input referred noise of 114 ${\mu}Vrms$ while dissipating 20 mW from a 3 V supply.

• Journal of Advanced Navigation Technology
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• v.24 no.1
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• pp.53-60
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• 2020

In this paper, We have studied the structure of a Telemetry Transmitter capable of transmitting variable data rates. This paper proposed a structure combining variable pre-modulation filter with cutoff characteristic with variable input sample rate converter. Variable pre-modulation filter has the same characteristics as pre-modulation filter and is converted to a constant sampling rate without structural changes according to the variable input data rate. We propose a software program that actively controls variable pre-modulation filter and variable input sample rate converter to respond to real-time changing data.