• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.41.3-41
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• 2002

Motion estimation using Full-Search(FS) and Block-Matching Algorithm(BMA) is often used in the case of moving object tracking by vision sensors. However these methods often miss the real-time vision data because these schemes suffer the heavy computational load. When the image size of moving object is changed in an image frame according to the distance between the camera of mobile robot and the moving object, the tracking performance of a moving object may decline with these methods because of the shortage of active handling. In this paper, the variable-representative block that can reduce a lot of data computations, is defined and optimized by changing the size of representative block accor...

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.4
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• pp.822-833
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• 1996

The video coding for very low bit rate has recently received considerable attention, but conventional block based transform coding schemes suffer from the blocking effect for the constraints of bit rates. In this paper, we present a video coding sysem suing multi-resolution motion estimation/compensation with variable size block(VMRME/C) and multi-resolution vector quantization(MRVQ) in wavelet transform domain for very low bit rate coding. It is shown that the presented scheme has better performance in the peak signal-to-nose ratio(RSNR) by 0.2-0.6 dB as well as subjective quality than that of conventional block based transform video coding techniques(especially, H. 263 which is DCT based video coding).

• ETRI Journal
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• v.30 no.4
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• pp.506-515
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• 2008

The H.264/AVC standard has adopted new coding tools such as intra-prediction, variable block size, motion estimation with quarter-pixel-accuracy, loop filter, and so on. The adoption of these tools enables an H.264/AVC-coded bitstream to have more information than was possible with previous standards. In this paper, we propose an effective spatial error concealment method with low complexity in H.264/AVC intra-frame. From information included in an H.264/AVC-coded bitstream, we use prediction modes of intra-blocks to recover a damaged block. This is because the prediction direction in each prediction mode is highly correlated to the edge direction. We first estimate the edge direction of a damaged block using the prediction modes of the intra-blocks adjacent to a damaged block and classify the area inside the damaged block into edge and flat areas. Our method then recovers pixel values in the edge area using edge-directed interpolation, and recovers pixel values in the flat area using weighted interpolation. Simulation results show that the proposed method yields better video quality than conventional approaches.

• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.10 no.2
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• pp.53-61
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• 2011

This research presents an adaptive fast motion estimation (ME) computation on the stage of uneven multi-hexagon grid search (UMHGS) algorithm included in an unsymmetrical-cross multi-hexagon-grid search (UMHexagonS) in H.264 standard. The proposed adaptive method is based on statistical analysis and previously obtained motion vectors to reduce the computational complexity of ME. For this purpose, the algorithm is decomposed into three processes: skipping, terminating, and reducing search areas. Skipping and terminating are determined by the statistical analysis of the collected minimum SAD (sum of absolute difference) and the search area is constrained by the slope of previously obtained motion vectors. Simulation results show that 13%-23% of ME time can be reduced compared with UMHexagonS, while still maintaining a reasonable PSNR (peak signal-to-noise ratio) and average bitrates.

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.141-144
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• 2003

가장 최근의 동영상 압축 표준인 H.264는 매크로블록의 최적 모드를 결정하기 위하여 총 7가지 모드를 사용하여 움직임 예측을 수행하기 때문에 부호화 효율과 수행 성능 면에서 기존의 방식에 비해 좋은 결과를 보이지만, 움직임 예측 과정에서 많은 계산 시간을 필요로 한다는 것이 커다란 단점으로 지적되고 있다. 따라서, 본 논문에서는 H.264에서 가변 블륵 단위의 움직임 예측 시 인접한 블록과의 상관성을 분석하여 다음 움직임 예측 모드의 사용 여부를 결정하는 블록 병합 알고리즘을 HEXBS(Hexagon-based Search) 고속 움직임 탐색 알고리즘에 적용하여 움직임 예측 시간을 효율적으로 절약하는 방법을 제안한다.

• Journal of Internet Computing and Services
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• v.11 no.2
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• pp.49-60
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• 2010

H.264/AVC offers a better encoding efficiency than conventional video standards by adopting many new encoding techniques. However, the advanced coding techniques also add to the overall complexity for H.264/AVC encoder. Accordingly, it is necessary to perform optimization to alleviate the level of complexity for the video encoder. The amount of computation for motion estimation is of particular importance. In this paper, we propose a diamond web-grid search algorithm combined with efficient stationary block skip method which employs full diamond and dodecagon search patterns, and the variable thresholds are used for performing an effective skip of stationary blocks. The experimental results indicate that the proposed technique reduces the computations of the unsymmetrical-cross multi-hexagon-grid search algorithm by up to 12% while maintaining a similar PSNR performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.10C
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• pp.1036-1043
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• 2005

In this paper, we propose a sequential motion vector recovery algorithm for H.264 video coding standard. Motion vectors of H.264 video coding standard cover relatively smaller areas than other standard, since motion estimation of H.264 takes place in the fashion of variable block size. Therefore, the correlation of motion vectors between neighboring blocks increases as the block size of motion estimation is lowered. Under the framework of sequential recovery, we introduce a motion vector recovery using $\alpha$-trimed mean filter. Experimental results show that proposed algorithm is useful in real time video delivery .with nearly comparable or better visual quality than previous approaches such as macro block boundary matching and Lagrage interpolation.

• Korean Journal of Computational Design and Engineering
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• v.8 no.4
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• pp.254-261
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• 2003

In mold and die shops, NC machining process mainly affects the quality of the machined surface and the manufacturing time of molds and dies. The estimation of NC machining time is a prerequisite to measure the machining productivity and to generate a process schedule, which generally includes the process sequence and the completion time of each process. It is required to take into account dynamic characteristics in the estimation, such as the ac/deceleration of NC machine controllers. Intensive observations at start and end points of NC blocks show that a minimum feedrate, a key variable in a machining time model, has a close relation to a block distance, an angle between blocks, and a command feedrate. Thus, this study addresses regression models for the minimum feedrate estimation on short and long NC blocks considering these parameters. Furthermore, machining time estimation models by the four types of feedrate behaviors are suggested based on the estimated minimum feedrate. To show the validity of the proposed machining time model, the study compares the estimated with the actual machining time in the sculptured surface machining of several mold dies.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.53-60
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• 2009

Motion estimation for H.264/AVC video CODEC is very complex and requires a huge amount of computational efforts because it uses multiple reference frames and variable block sizes. We propose the architecture of high-performance integer-pixel motion estimation circuit based on fast algorithms for multiple reference frame selection, block matching, block mode decision and motion vector estimation. We also propose the architecture of high-performance interpolation circuit for sub-pixel motion estimation. We described the RTL circuit in Verilog HDL and synthesized the gate-level circuit using 130nm standard cell library. The integer-pixel motion estimation circuit consists of 77,600 logic gates and four $32\times8\times32$-bit dual-port SRAM's. It has tile maximum operating frequency of 161MHz and can process up to 51 D1 (720$\times$480) color in go frames per second. The fractional motion estimation circuit consists of 22,478 logic gates. It has the maximum operating frequency of 200MHz and can process up to 69 1080HD (1,920$\times$1,088) color image frames per second.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.66-76
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• 2009

The motion estimation in video encoding system occupies the biggest part. So, we require the motion estimator with efficient structure for real-time operation. And for motion estimator's implementation, it is desired to design hardware module of an exclusive use that perform the encoding process at high speed. This paper proposes motion estimation detection block(MED), 41 SADs(Sum of Absolute Difference) calculation block, minimum SAD calculation and motion vector generation block based on parallel processing. The parallel processing can reduce effectively the amount of the operation. The minimum SAD calculation and MED block uses the pre-computation technique for reducing switching activity of the input signal. It results in high-speed operation. The MED and 41 SADs calculation blocks are composed of adder tree which causes the problem of critical path. So, the structure of adder tree has changed the most commonly used ripple carry adder(RCA) with carry skip adder(CSA). It enables adder tree to operate at high speed. In addition, as we enabled to easily control key variables such as control signal of search range from the outside, the efficiency of hardware structure increased. Simulation and FPGA verification results show that the delay of MED block generating the critical path at the motion estimator is reduced about 19.89% than the conventional strukcture.