• Proceedings of the Korean Institute of Surface Engineering Conference
• /
• 2013.05a
• /
• pp.154-154
• /
• 2013

In this work, we investigated the characteristics and the effects of light on the negative gate bias stress stability (NBS) in high mobility polycrystalline IGO TFTs. IGO TFT showed a high drain current on/off ratio of ${\sim}10^9$, a field-effect mobility of $114cm^2/Vs$, a threshold voltage of -4V, and a subthresholdslpe(SS) of 0.28V/decade from log($I_{DS}$) vs $V_{GS}$. IGO TFTs showed large negative $V_{TH}$ shift(17V) at light power of $5mW/cm^2$ with negative gate bias stress of -10V for 10000seconds, at a fixed drain voltage ($V_{DS}$) of 0.5V.

• Journal of the Korean Society of Safety
• /
• v.11 no.3
• /
• pp.75-80
• /
• 1996

This paper presents a study on characteristics and safety for human body in ELF electric and magnetic fields using statistical method. The magnetic fields from a power line can be computed given a knowledge of the currents, voltage and geometry of the line. In this paper, a statistical method for predicting the magnetic fields given the inherent indetermination of the currents is presented. But the electric field is calculated given a knowledge of the voltage and geometry of the line. The effect of unexpected fluctuations in current is modeled by the Monte Carlo simulation. The suggested method is applied to the 345kV and 765kV transmission line system, the result shows that the maximum electric and magnetic field intensity is 6.8627kV/m and 284mG in 345kV system, 2. 5590kV/m and 35mG in 765kV system, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2011.10a
• /
• pp.398-401
• /
• 2011

This paper presents a high-efficiency CMOS PWM DC-DC buck converter. It generates a constant output voltage(1-2.8V), from an input voltage(3.4-3.9V). Inductor-based type is chosen and inductor current is controlled with PWM operation. The designed circuit consists of power switch, Pulse Width Generation, Buffer, Zero Current Sensing, Current Sensing Circuit, Clock & Ramp generation, V-I Converter, Soft Start, Compensator and Modulator. Switching Frequency is 1MHz, It operates in CCM when the load current is more than 40mA, and the maximum efficiency is 98.71% at 100mA. Output voltage ripple is 0.98mV(input voltage:3.5V, output voltage:2.5V). The performance of the designed circuit has been verified through extensive simulation using a CMOS $0.18{\mu}m$ technology.

• Journal of Yeungnam Medical Science
• /
• v.6 no.2
• /
• pp.241-245
• /
• 1989

Induction of A-V block by tachycardia is a well-known phenomenon. But there are few case reports of bradycardia-dependent A-V block. We report a case of bradycardia-dependent A-V block with review of literatures. This patient was a 52-year-old fe male who complained of dizziness and anterior chest discomfort. Electrocardiographic recording demonstrated complete A-V block. Monitor electrocardiographic recordings during sitting position and after atropine administration demonstrated decrease of degree of block from complete A-V block to first degree A-V block. The occurrence of complete A-V block for bradycardia during supine position suggests a phase 4-dependent block. After a permanent ventricular pacemaker was implanted, the patient recovered and was with out symptoms during 12 months follow up.

• Proceedings of the KIEE Conference
• /
• summer
• /
• pp.554-556
• /
• 2004

Testing capacity of KERI synthetic short-circuit testing facilities has been upgraded to fulfill the requirements up to 550kV 63kA, 1-break circuit breaker ratings. Specially the current capacity was increased 50kA to 63kA and the full type test of 362kV 63kA circuit breaker(1-break) was firstly completed in domestic. UP to now, domestic manufacturers have depended on the foreign testing laboratory for performance verification of newly designed products. This paper introduces the summary of the increased short-circuit testing facilities, the testing techniques and its results for the making and breaking performance of 362kV, 63kA circuit breaker which was Performed according to IEEE C37.06(1999) used in North America.

• Proceedings of the KIEE Conference
• /
• summer
• /
• pp.192-194
• /
• 2004

At present, application of PSS/E input data for power flow , stability and fault analysis consist of only 154kV and over data(except 22.9kV data). 22.9kV(5.C) Static Condenser is in operation and installation at 22.9kV Bus of 154kV Substation. however, we assume that 22.9kV 5.C install at 154kV Bus. so, we need to study and search about critical limit for 154kV Bus standard operating Voltage according to 22.9kV 5.C Modeling Site by PSS/E Ver28

• Journal of the Institute of Electronics and Information Engineers
• /
• v.53 no.5
• /
• pp.69-76
• /
• 2016

Current driving capability of MCT (MOS Controlled Thyristor) is determined by turn-off capability of conducting current, that is off-FET performance of MCT. On the other hand, having a good turn-on characteristics, including high peak anode current ($I_{peak}$) and rate of change of current (di/dt), is essential for pulsed power system which is one of major application field of MCTs. To satisfy above two requirements, careful control of on/off-FET performance is required. However, triple diffusion and several oxidation processes change surface doping profile and make it hard to control threshold voltage ($V_{th}$) of on/off-FET. In this paper, we have demonstrated the effect of $V_{th}$ adjustment ion implantation on the performance of MCT. The fabricated MCTs (active area = $0.465mm^2$) show forward voltage drop ($V_F$) of 1.25 V at $100A/cm^2$ and Ipeak of 290 A and di/dt of $5.8kA/{\mu}s$ at $V_A=800V$. While these characteristics are unaltered by $V_{th}$ adjustment ion implantation, the turn-off gate voltage is reduced from -3.5 V to -1.6 V for conducting current of $100A/cm^2$ when the $V_{th}$ adjustment ion implantation is carried out. This demonstrates that the current driving capability is enhanced without degradation of forward conduction and turn-on switching characteristics.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2003.03a
• /
• pp.131-131
• /
• 2003

Surface micromachined uncooled IR detector with the optimized VOx bolometric layer was fabricated based on sandwich structure of the V$_2$O$_{5}$V/V$_2$O$_{5}$. In order to improve the detectivity of the IR detector, we optimized a few factors in the viewpoint of bolometric material. Vanadium oxide thin film is a promising material for uncooled microbolometers due to its high temperature coefficient of resistance at room temperature. It is, however, very difficult to deposit vanadium oxide thin films having high temperature coefficient of resistance and low resistance because of process limits in microbolometer fabrication. In order to increase the responsivity and decrease noise, we increase TCR of bolometric material and decrease room temperature resistance based on the sandwich structure of the V$_2$O$_{5}$V/V$_2$O$_{5}$ by conventional sputter. By oxygen diffusion through low temperature annealing of V$_2$O$_{5}$V/V$_2$O$_{5}$ in oxygen ambient, various mixed phase vanadium oxide was formed and we obtained TCR in range of-1.2 ~-2.6%/$^{\circ}C$ at room temperature resistance of 5~100k$\Omega$.mega$.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2012.10a
• /
• pp.852-855
• /
• 2012

A DC-DC converter for EEPROM IPs which perfom erasing by the FN (Fowler-Nordheim) tunneling and programming by the band-to-band tunneling is designed in this paper. For the DC-DC converter for EEPROM IPs using a low voltage of $1.5V{\pm}10%$ as the logic voltage, a scheme of using VRD (Read Voltage) instead of VDD is proposed to reduce the pumping stages and pumping capacitances of its charge pump circuit. VRD ($=3.1V{\pm}0.1V$) is a regulated voltage by a voltage regulator using an external voltage of 5V. The designed DC-DC converter outputs VPP (=8V) and VNN (=-8V) in the write mode.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.6
• /
• pp.52-57
• /
• 2009

This paper presents a low-noise low-dropout linear regulator that is suitable for on-chip integration with RF transceiver ICs. In the bandgap reference, a stacked diode structure is adopted for saving silicon area as well as maintaining low output noise characteristic. Theoretical analysis for supporting the approach is also described. The linear regulator is fabricated in $0.18{\mu}m$ CMOS process. It operates with an input voltage range of 2.2 V - 5 V and provide the output voltage of 1.8 V and the output current up to 90 mA. The measured line and load regulation is 0.04%/V and 0.46%, respectively. The output noise voltage is measured to be 479 nV/$^\surd{Hz}$ and 186 nV/$^\surd{Hz}$ from 100 Hz and 1 kHz offset, respectively.