• Title/Summary/Keyword: V-mask

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Effects of thickness of GIZO active layer on device performance in oxide thin-film-transistors

  • Woo, C.H.;Jang, G.J.;Kim, Y.H.;Kong, B.H.;Cho, H.K.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.137-137
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    • 2009
  • Thin-film transistors (TFTs) that can be prepared at low temperatures have attracted much attention due to the great potential for flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited by low field effect mobility or rapidly degraded after exposing to air in many cases. Another approach is amorphous oxide semiconductors. Amorphous oxide semiconductors (AOSs) have exactly attracted considerable attention because AOSs were fabricated at room temperature and used lots of application such as flexible display, electronic paper, large solar cells. Among the various AOSs, a-IGZO was considerable material because it has high mobility and uniform surface and good transparent. The high mobility is attributed to the result of the overlap of spherical s-orbital of the heavy pest-transition metal cations. This study is demonstrated the effect of thickness channel layer from 30nm to 200nm. when the thickness was increased, turn on voltage and subthreshold swing were decreased. a-IGZO TFTs have used a shadow mask to deposit channel and source/drain(S/D). a-IGZO were deposited on SiO2 wafer by rf magnetron sputtering. using power is 150W, working pressure is 3m Torr, and an O2/Ar(2/28 SCCM) atmosphere at room temperature. The electrodes were formed with Electron-beam evaporated Ti(30nm) and Au(70nm) structure. Finally, Al(150nm) as a gate metal was evaporated. TFT devices were heat treated in a furnace at $250^{\circ}C$ in nitrogen atmosphere for an hour. The electrical properties of the TFTs were measured using a probe-station to measure I-V characteristic. TFT whose thickness was 150nm exhibits a good subthreshold swing(S) of 0.72 V/decade and high on-off ratio of 1E+08. Field effect mobility, saturation effect mobility, and threshold voltage were evaluated 7.2, 5.8, 8V respectively.

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Analysis of the Effect of the Etching Process and Ion Injection Process in the Unit Process for the Development of High Voltage Power Semiconductor Devices (고전압 전력반도체 소자 개발을 위한 단위공정에서 식각공정과 이온주입공정의 영향 분석)

  • Gyu Cheol Choi;KyungBeom Kim;Bonghwan Kim;Jong Min Kim;SangMok Chang
    • Clean Technology
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    • v.29 no.4
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    • pp.255-261
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    • 2023
  • Power semiconductors are semiconductors used for power conversion, transformation, distribution, and control. Recently, the global demand for high-voltage power semiconductors is increasing across various industrial fields, and optimization research on high-voltage IGBT components is urgently needed in these industries. For high-voltage IGBT development, setting the resistance value of the wafer and optimizing key unit processes are major variables in the electrical characteristics of the finished chip. Furthermore, the securing process and optimization of the technology to support high breakdown voltage is also important. Etching is a process of transferring the pattern of the mask circuit in the photolithography process to the wafer and removing unnecessary parts at the bottom of the photoresist film. Ion implantation is a process of injecting impurities along with thermal diffusion technology into the wafer substrate during the semiconductor manufacturing process. This process helps achieve a certain conductivity. In this study, dry etching and wet etching were controlled during field ring etching, which is an important process for forming a ring structure that supports the 3.3 kV breakdown voltage of IGBT, in order to analyze four conditions and form a stable body junction depth to secure the breakdown voltage. The field ring ion implantation process was optimized based on the TEG design by dividing it into four conditions. The wet etching 1-step method was advantageous in terms of process and work efficiency, and the ring pattern ion implantation conditions showed a doping concentration of 9.0E13 and an energy of 120 keV. The p-ion implantation conditions were optimized at a doping concentration of 6.5E13 and an energy of 80 keV, and the p+ ion implantation conditions were optimized at a doping concentration of 3.0E15 and an energy of 160 keV.

Low-temperature solution-processed aluminum oxide layers for resistance random access memory on a flexible substrate

  • Sin, Jung-Won;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.257-257
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    • 2016
  • 최근에 메모리의 초고속화, 고집적화 및 초절전화가 요구되면서 resistive random access memory (ReRAM), ferroelectric RAM (FeRAM), phase change RAM (PRAM)등과 같은 차세대 메모리 기술이 활발히 연구되고 있다. 다양한 메모리 중에서 특히 resistive random access memory (ReRAM)는 빠른 동작 속도, 낮은 동작 전압, 대용량화와 비휘발성 등의 장점을 가진다. ReRAM 소자는 절연막의 저항 스위칭(resistance switching) 현상을 이용하여 동작하기 때문에 SiOx, AlOx, TaOx, ZrOx, NiOx, TiOx, 그리고 HfOx 등과 같은 금속 산화물에 대한 연구들이 활발하게 이루어지고 있다. 이와 같이 다양한 산화물 중에서 AlOx는 ReRAM의 절연막으로 적용되었을 때, 우수한 저항변화특성과 안정성을 가진다. 하지만, AlOx 박막을 형성하기 위하여 기존에 많이 사용되어지던 PVD (physical vapour deposition) 또는 CVD (chemical vapour deposition) 방법에서는 두께가 균일하고 막질이 우수한 박막을 얻을 수 있지만 고가의 진공장비 사용 및 대면적 공정이 곤란하다는 문제점이 있다. 한편, 용액 공정 방법은 공정과정이 간단하여 경제적이고 대면적화가 가능하며 저온에서 공정이 이루어지는 장점으로 많은 관심을 받고 있다. 본 연구에서는 sputtering 방법과 용액 공정 방법으로 형성한 AlOx 기반의 ReRAM에서 메모리 특성을 비교 및 평가하였다. 먼저, p-type Si 기판 위에 습식산화를 통하여 SiO2 300 nm를 성장시킨 후, electron beam evaporation으로 하부 전극을 형성하기 위하여 Ti와 Pt를 각각 10 nm와 100 nm의 두께로 증착하였다. 이후, 제작된 AlOx 용액을 spin coating 방법으로 1000 rpm 10 초, 6000 rpm 30 초의 조건으로 증착하였다. Solvent 및 불순물 제거를 위하여 $180^{\circ}C$의 온도에서 10 분 동안 열처리를 진행하였고, 상부 전극을 형성하기 위해 shadow mask를 이용하여 각각 50 nm, 100 nm 두께의 Ti와 Al을 electron beam evaporation 방법으로 증착하였다. 측정 결과, 용액 공정 방법으로 형성한 AlOx 기반의 ReRAM에서는 기존의 sputtering 방법으로 제작된 ReRAM에 비해서 저항 분포가 균일하지는 않았지만, 103 cycle 이상의 우수한 endurance 특성을 나타냈다. 또한, 1 V 내외로 동작 전압이 낮았으며 104 초 동안의 retention 측정에서도 메모리 특성이 일정하게 유지되었다. 결론적으로, 간단한 용액 공정 방법은 ReRAM 소자 제작에 많이 이용될 것으로 기대된다.

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Fabrication of Resistive Switching Memory based on Solution Processed AlOx - PMMA Blended Thin Film

  • Sin, Jung-Won;Baek, Il-Jin;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.181.1-181.1
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    • 2015
  • 용액 공정을 이용한 Resistive random access memory (ReRAM)은 간단한 공정 과정, 대면적화, 저렴한 가격 등의 장점으로 인해 큰 관심을 받고 있으며, HfOx, TiOx, AlOx 등의 산화물이 ReRAM 절연 막으로 주로 연구되고 있다. 더 나아가 최근에는 organic 물질을 메모리 소자로 사용한 연구가 보고되고 있다. 이는 경제적이며, wearable 또는 flexible system에 적용이 용이하다. 그럼에도 불구하고, organic 물질을 갖는 메모리 소자는 기존의 산화물 소자에 비해 열에 취약하며 전기적인 특성과 신뢰성이 우수하지 못하다는 단점을 가지고 있다. 이를 위한 방안으로 본 연구에서는 AlOx - polymethylmethacrylate (PMMA) blended thin film ReRAM을 제안하였다. 이는 organic물질의 전기적 특성을 개선시킬 뿐 아니라, inorganic 물질을 wearable 소자에 적용했을 때 발생하는 crack과 같은 기계적 물리적 결함을 해결할 수 있는 새로운 방법이다. 먼저, P-type Si 위에 습식산화를 통하여 SiO2 300 nm 성장시킨 기판을 사용하여 electron beam evaporation으로 10 nm의 Ti, 100 nm의 Pt 층을 차례로 증착하였다. 그리고 PMMA 용액과 AlOx 용액을 초음파를 이용하여 혼합한 뒤, 이 용액을 Pt 하부 전극 상에서 spin coating방법으로 1000 rpm 10초, 5000 rpm 30초의 조건으로 증착하였다. Solvent 및 불순물 제거를 위하여 150, 180, $210^{\circ}C$의 온도로 30 분 동안 열처리를 진행하였고, shadow mask를 이용하여 상부 전극인 Ti를 sputtering 방식으로 100 nm 증착하였다. 150, 180, $210^{\circ}C$로 각각 열처리한 AlOx - PMMA blended ReRAM의 전기적 특성은 HP 4156B semiconductor parameter analyzer를 이용하여 측정하였다. 측정 결과 제작된 소자 전부에서 2 V이하의 낮은 동작전압, 안정된 DC endurance (>150cycles), 102 이상의 높은 on/off ratio를 확인하였고, 그 중 $180^{\circ}C$에서 열처리한 ReRAM은 더 높은 on/off ratio를 갖는 것을 확인하였다. 결론적으로 baking 온도를 최적화하였으며 AlOx - PMMA blended film ReRAM의 우수한 메모리 특성을 확인하였다. AlOx-PMMA blended film ReRAM은 organic과 inorganic의 장점을 갖는 wearable 및 system용 비휘발성 메모리소자에 적용이 가능한 경제적인 기술로 판단된다.

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Improvement in Light Extraction Efficiency of 380 nm UV-LED Using Nano-patterned n-type Gan Substrate (나노 구조의 패턴을 갖는 n-type GaN 기판을 이용한 380 nm UV-LED의 광 추출 효율 개선)

  • Baek, Kwang-Sun;Jo, Min-Sung;Lee, Young-Gon;Sadasivam, Karthikeyan Giri;Song, Young-Ho;Kim, Seung-Hwan;Kim, Jae-Kwan;Jeon, Seong-Ran;Lee, June-Key
    • Korean Journal of Materials Research
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    • v.21 no.5
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    • pp.273-276
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    • 2011
  • Ultraviolet (UV) light emitting diodes (LEDs) were grown on a patterned n-type GaN substrate (PNS) with 200 nm silicon-di-oxide (SiO2) nano pattern diameter to improve the light output efficiency of the diodes. Wet etched self assembled indium tin oxide (ITO) nano clusters serve as a dry etching mask for converting the SiO2 layer grown on the n-GaN template into SiO2 nano patterns by inductively coupled plasma etching. PNS is obtained by n-GaN regrowth on the SiO2 nano patterns and UV-LEDs were fabricated using PNS as a template. Two UV-LEDs, a reference LED without PNS and a 200 nm PNS UV-LEDs were fabricated. Scanning Electron microscopy (SEM), Transmission Electron Microscopy (TEM), X-Ray Diffraction (XRD), Photoluminescence (PL) and Light output intensity- Input current- Voltage (L-I-V) characteristics were used to evaluate the ITO-$SiO_2$ nanopattern surface morphology, threading dislocation propagation, PNS crystalline property, PNS optical property and UVLED device performance respectively. The light out put intensity was enhanced by 1.6times@100mA for the LED grown on PNS compared to the reference LED with out PNS.

Passivation Layer (Thermosetting Film)가 형성된 유기박막 트랜지스터의전기적 특성 변화에 대한 연구

  • Seong, Si-Hyeon;Kim, Gyo-Hyeok;Jeong, Il-Seop
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.380-380
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    • 2013
  • 본 논문에서는 외기 환경 요인 중에서 H2O와 O2의 영향으로 성능이 저하되는 유기박막트랜지스터(OTFT)의 수명시간 향상을 위하여 필요한 passivation layer의 효과에 대하여 알아 보았다. OTFT에 기존의 액상 공정이나 증착 공정으로 단일 passivation layer또는 다층 passivation layer를 형성하는 방식과는 다르게 향후에 산업 전반에 적용이 기대되는 것을 고려하여 제작 공정의 간편성을 위하여 film 형태로 되어 있는 열경화성 epoxy resin film으로 passivation layer를 구현하는 방법을 사용하여 OTFT의 storage stability를 평가하였다. passivation layer가 없는 OTFT와 열경화성 epoxy resin film으로 passivation된 OTFT의 전기적 특성이 서로 비교 평가되었으며 또한 30일 동안 온도 $25^{\circ}C$ 상대습도 40%의 환경을 갖는 Desicator 안에서 소자를 보관하여 시간에 따른 전기적 특성 변화를 검증하여 epoxy resin film의 passivation layer으로의 적용가능성을 검증하였다. 결과적으로 30일 후의 passivation layer가 없는 OTFT의 전기적 특성은 매우 낮게 떨어진 반면에 epoxy resin film으로 passivation layer가 구현된 OTFT의 mobility는 $0.060cm^2$/Vs, VT는 -0.18 V, on/off ratio는 $3.7{\times}10^3$으로 초기의 소자 특성이 잘 유지되는 결과를 얻었다. OTFT는 Flexible한 polyethersulfone (PES)기판에 게이트 전극이 하부에 있는 Bottom gate 구조로 제작되었고 채널 형성을 위한 유기반도체 재료로 6,13-bis (triisopropylsilylethynyl) (TIPS) pentacene이 사용되었고 spin coating된 Poly-4-vinylphenol (PVP)가 게이트 절연체로 사용되었다. 이때 Au전극은 Shadow mask를 이용하여 증착하였다. 또한 OTFT의 채널 길이 $100{\mu}m$, 채널 폭 $300{\mu}m$의 영역에 Drop casting법을 사용하여 채널을 형성하였다. 물리적 특성은 scanning electron microscopy (SEM), scanning probe microscopy (SPM), x-ray diffraction (XRD)를 사용하여 분석하였고, 전기적 특성은 Keithley-4200을 사용하여 추출하였다.

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3D Lithography using X-ray Exposure Devices Integrated with Electrostatic and Electrothermal Actuators

  • Lee, Kwang-Cheol;Lee, Seung S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.4
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    • pp.259-267
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    • 2002
  • We present a novel 3D fabrication method with single X-ray process utilizing an X-ray mask in which a micro-actuator is integrated. An X-ray absorber is electroplated on the shuttle mass driven by the integrated micro-actuator during deep X-ray exposures. 3D microstructures are revealed by development kinetics and modulated in-depth dose distribution in resist, usually PMMA. Fabrication of X-ray masks with integrated electrothermal xy-stage and electrostatic actuator is presented along with discussions on PMMA development characteristics. Both devices use $20-\mu\textrm{m}$-thick overhanging single crystal Si as a structural material and fabricated using deep reactive ion etching of silicon-on-insulator wafer, phosphorous diffusion, gold electroplating, and bulk micromachining process. In electrostatic devices, $10-\mu\textrm{m}-thick$ gold absorber on $1mm{\times}1mm$ Si shuttle mass is supported by $10-\mu\textrm{m}-wide$, 1-mm-long suspension beams and oscillated by comb electrodes during X-ray exposures. In electrothermal devices, gold absorber on 1.42 mm diameter shuttle mass is oscillated in x and y directions sequentially by thermal expansion caused by joule heating of the corresponding bent beam actuators. The fundamental frequency and amplitude of the electrostatic devices are around 3.6 kHz and $20\mu\textrm{m}$, respectively, for a dc bias of 100 V and an ac bias of 20 VP-P (peak-peak). Displacements in x and y directions of the electrothermal devices are both around $20{\;}\mu\textrm{m}$at 742 mW input power. S-shaped and conical shaped PMMA microstructures are demonstrated through X-ray experiments with the fabricated devices.

A Novel z-axis Accelerometer Fabricated on a Single Silicon Substrate Using the Extended SBM Process (Extended SBM 공정을 이용하여 단일 실리콘 기판상에 제작된 새로운 z 축 가속도계)

  • Ko, Hyoung-Ho;Kim, Jong-Pal;Park, Sang-Jun;Kwak, Dong-Hun;Song, Tae-Yong;Cho, Dong-Il;Huh, Kun-Soo;Park, Jahng-Hyon
    • Journal of Sensor Science and Technology
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    • v.13 no.2
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    • pp.101-109
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    • 2004
  • This paper presents a novel z-axis accelerometer with perfectly aligned vertical combs fabricated using the extended sacrificial bulk micromachining (extended SBM) process. The z-axis accelerometer is fabricated using only one (111) SOI wafer and two photo masks without wafer bonding or CMP processes as used by other research efforts that involve vertical combs. In our process, there is no misalignment in lateral gap between the upper and lower comb electrodes, because all critical dimensions including lateral gaps are defined using only one mask. The fabricated accelerometer has the structure thickness of $30{\mu}m$, the vertical offset of $12{\mu}m$, and lateral gap between electrodes of $4{\mu}m$. Torsional springs and asymmetric proof mass produce a vertical displacement when an external z-axis acceleration is applied, and capacitance change due to the vertical displacement of the comb is detected by charge-to-voltage converter. The signal-to-noise ratio of the modulated and demodulated output signal is 80 dB and 76.5 dB, respectively. The noise equivalent input acceleration resolution of the modulated and demodulated output signal is calculated to be $500{\mu}g$ and $748{\mu}g$. The scale factor and linearity of the accelerometer are measured to be 1.1 mV/g and 1.18% FSO, respectively.

Flexible Background-Texture Analysis for Coronary Artery Extraction Based on Digital Subtraction Angiography (유동적인 배경 텍스쳐 분석을 통한 DSA 기반의 관상동맥 검출)

  • Park Sung-Ho;Lee Joong-Jae;Lee Geun-Soo;Kim Gye-Young
    • The KIPS Transactions:PartB
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    • v.12B no.5 s.101
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    • pp.543-552
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    • 2005
  • This paper proposes the extraction of coronary arteries based on DSA(Digital Subtraction Angiography) through a texture analysis of background in the angiography. DSA is a well established modality for the visualization of coronary arteries. DSA involves the subtraction of a mask image - an image of the heart before injection of contrast medium - from live image. However, this technique is sensitive to the movement of background and can result to a wrong detection by the variance of background gray-level intensity between two images. Therefore, this paper solves a structural problem resulted from a background movement bV selecting an image which has the least difference of movement through an analysis of the similarity of background texture and proposes a method to extract only the blood vessel efficiently through local gray-level correction of the selected image. Using the coronary angiogram of 5 patients clinical data, we proved that the proposed method has the lower false-detection rate, approximately $2\%$, and the higher accuracy than the existing methods.

Principal Components Logistic Regression based on Robust Estimation (로버스트추정에 바탕을 둔 주성분로지스틱회귀)

  • Kim, Bu-Yong;Kahng, Myung-Wook;Jang, Hea-Won
    • The Korean Journal of Applied Statistics
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    • v.22 no.3
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    • pp.531-539
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    • 2009
  • Logistic regression is widely used as a datamining technique for the customer relationship management. The maximum likelihood estimator has highly inflated variance when multicollinearity exists among the regressors, and it is not robust against outliers. Thus we propose the robust principal components logistic regression to deal with both multicollinearity and outlier problem. A procedure is suggested for the selection of principal components, which is based on the condition index. When a condition index is larger than the cutoff value obtained from the model constructed on the basis of the conjoint analysis, the corresponding principal component is removed from the logistic model. In addition, we employ an algorithm for the robust estimation, which strives to dampen the effect of outliers by applying the appropriate weights and factors to the leverage points and vertical outliers identified by the V-mask type criterion. The Monte Carlo simulation results indicate that the proposed procedure yields higher rate of correct classification than the existing method.