• Title/Summary/Keyword: Using time

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Processing Time and Traffic Capacity Analysis for RFID System Using LBT-Serial Searching Scheme (LBT-Serial Searching 방식을 채용한 RFID 시스템의 트래픽 처리 시간 및 용량 해석)

  • Hwang In-Kwan;Cho Hae-Keun;Pyo Cheol-Sig
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.10A
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    • pp.930-937
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    • 2005
  • In this paper, a processing time and traffic capacity analysis algorithm for RFID system using LBT-serial searching scheme is proposed. Service time, carrier sensing time, additional delay time required for contiguous frequency channel occupancy, and additional delay time required for the contiguous using the same frequency channel are considered and the processing delay and frequency channel capacity are analyzed for the steady state operation of the system. The simulation results showing maximum capacity of the system and explaining the accuracy of the algorithm are provided.

Optimal time control of multiple robot using hopfield neural network (홉필드 신경회로망을 이용한 다중 로보트의 최적 시간 제어)

  • 최영길;이홍기;전홍태
    • 제어로봇시스템학회:학술대회논문집
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    • 1991.10a
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    • pp.147-151
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    • 1991
  • In this paper a time-optimal path planning scheme for the multiple robot manipulators will be proposed by using hopfield neural network. The time-optimal path planning, which can allow multiple robot system to perform the demanded tasks with a minimum execution time and collision avoidance, may be of consequence to improve the productivity. But most of the methods proposed till now suffers from a significant computational burden and thus limits the on-line application. One way to avoid such a difficulty is to rearrange the problem as MTSP(Multiple Travelling Salesmen Problem) and then apply the Hopfield network technique, which can allow the parallel computation, to the minimum time problem. This paper proposes an approach for solving the time-optimal path planning of the multiple robots by using Hopfield neural network. The effectiveness of the proposed method is demonstrated by computer simulation.

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An Implementation of Clock Synchronization in FPGA Based Distributed Embedded Systems Using CDR (CDR을 사용한 FPGA 기반 분산 임베디드 시스템의 클록 동기화 구현)

  • Song, Jae-Min;Jung, Yong-Bae;Park, Young-Seak
    • IEMEK Journal of Embedded Systems and Applications
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    • v.12 no.4
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    • pp.239-246
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    • 2017
  • Time synchronization between distributed embedded systems in the Real Time Locating System (RTLS) based on Time Difference of Arrival (TDOA) is one of the most important factors to consider in system design. Clock jitter error between each system causes many difficulties in maintaining such a time synchronization. In this paper, we implemented a system to synchronize clocks between FPGA based distributed embedded systems using the recovery clock of CDR (clock data recovery) used in high speed serial communication to solve the clock jitter error problem. It is experimentally confirmed that the cumulative time error that occurs when the synchronization is not performed through the synchronization logic using the CDR recovery clock can be completely eliminated.

Planning a minimum time path for robot manipulator using genetic algorithm (유전알고리즘을 이용한 로보트 매니퓰레이터의 최적 시간 경로 계획)

  • Kim, Yong-Hoo;Kang, Hoon;Jeon, Hong-Tae
    • 제어로봇시스템학회:학술대회논문집
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    • 1992.10a
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    • pp.698-702
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    • 1992
  • In this paper, Micro-Genetic algorithms(.mu.-GAs) is proposed on a minimum-time path planning for robot manipulator, which is a kind of optimization algorithm. The minimum-time path planning, which can allow the robot system to perform the demanded tasks with a minimum execution time, may be of consequence to improve the productivity. But most of the methods proposed till now suffers from a significant computation burden and can't often find the optimal values. One way to overcome such difficulties is to apply the Micro-Genetic Algorithms, which can allow to find the optimal values, to the minimum-time problem. This paper propose an approach for solving the minimum-time path planning by using Micro-Genetic Algorithms. The effectiveness of the proposed method is demonstrated using the 2 d.o.f plannar Robot manipulator.

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Planning a Minimum Time Path for Multi-task Robot Manipulator using Micro-Genetic Algorithm (다작업 로보트 매니퓰레이터의 최적 시간 경로 계획을 위한 미소유전알고리즘의 적용)

  • 김용호;심귀보;조현찬;전홍태
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.4
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    • pp.40-47
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    • 1994
  • In this paper, Micro-Genetic algorithms($\mu$-GAs) is proposed on a minimum-time path planning for robot manipulator. which is a kind of optimization algorithm. The minimum-time path planning, which can allow the robot system to perform the demanded tasks with a minimum execution time, may be of consequence to improve the productivity. But most of the methods proposed till now suffers from a significant computation burden and can`t often find the optimaul values. One way to overcome such difficulties is to apply the Micro-Genetic Algorithms, which can allow to find the optimul values, to the minimum-time problem. This paper propose an approach for solving the minimum-time path planning by using Micro-Genetic Algorithms. The effectiveness of the proposed method is demonstrated using the 2 d.o.f plannar Robot manipulator.

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An Image Processing Speed Enhancement in a Multi-Frame Super Resolution Algorithm by a CUDA Method (CUDA를 이용한 초해상도 기법의 영상처리 속도개선 방법)

  • Kim, Mi-Jeong
    • Journal of the Korea Institute of Military Science and Technology
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    • v.14 no.4
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    • pp.663-668
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    • 2011
  • Although multi-frame super resolution algorithm has many merits but it demands too much calculation time. Researches have shown that image processing time can be reduced using a CUDA(Compute unified device architecture) which is one of GPGPU(General purpose computing on graphics processing unit) models. In this paper, we show that the processing time of multi-frame super resolution algorithm can be reduced by employing the CUDA. It was applied not to the whole parts but to the largest time consuming parts of the program. The simulation result shows that using a CUDA can reduce an operation time dramatically. Therefore it can be possible that multi-frame super resolution algorithm is implemented in real time by using libraries of image processing algorithms which are made by a CUDA.

A Study on EMG Signals Recognition using Time Delayed Counterpropagation Neural Network (시간 지연을 갖는 쌍전파 신경회로망을 이용한 근전도 신호인식에 관한 연구)

  • Kwon, Jangwoo;Jung, Inkil;Hong, Seunghong
    • Journal of Biomedical Engineering Research
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    • v.17 no.3
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    • pp.395-401
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    • 1996
  • In this paper a new neural network model, time delayed counterpropagation neural networks (TDCPN) which have high recognition rate and short total learning time, is proposed for electromyogram(EMG) recognition. Signals the proposed model increases the recognition rates after learned the regional temporal correlation of patterns using time delay properties in input layer, and decreases the learning time by using winner-takes-all learning rule. The ouotar learning rule is put at the output layer so that the input pattern is able to map a desired output. We test the performance of this model with EMG signals collected from a normal subject. Experimental results show that the recognition rates of the suggested model is better and the learning time is shorter than those of TDNN and CPN.

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Real-time Failure Detection of Composite Structures Using Optical Fiber Sensors (광섬유 센서를 이용한 복합재 구조물의 실시간 파손감지)

  • 방형준;강현규;류치영;김대현;강동훈;홍창선;김천곤
    • Proceedings of the Korean Society For Composite Materials Conference
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    • 2000.11a
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    • pp.128-133
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    • 2000
  • The objective of this research is to develop real-time failure detection techniques for damage assessment of composite materials using optical fiber sensors. Signals from matrix cracking or fiber fracture in composite laminates are treated by signal processing unit in real-time. This paper describes the implementation of time-frequency analysis such as the Short Time Fourier Transform(STFT) to determine the time of occurrence of failure. In order to verify the performance of the optical fiber sensor for stress wave detection, we performed pencil break test with EFPI sensor and compared it with that of PZT. The EFPI sensor was embedded in composite beam to sense the failure signals and a tensile test was performed. The signals of the fiber optic sensor when damage occurred were characterized using STFT and wavelet transform. Failure detection system detected the moment of failure accurately and showed good sensitivity with the infinitesimal failure signal.

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Controller Synthesis of A Nonlinear System Using Input/Output Linearization and Compensation for Input Time-Delay (비선형 시스템의 입/출력 선형화 제어기 설계와 입력 시간-지연 보상)

  • Cho, Yong-Ho;Chong, Kil-To
    • Proceedings of the KSME Conference
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    • 2004.04a
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    • pp.768-773
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    • 2004
  • This work deals with the synthesis of discrete-time nonlinear controller for input time-delay existing nonlinear system and proposes a new effective method to compensate the influence of input time-delay. The controller is synthesised by using input/output linearization. Under the circumstance that input time-delay exist, controller have to produce future value that will be needed for system. On account of this reason described, a weighted average predictor of combined states is adopted. Using the discretization via Euler method, numerical simulations about Van der Pol system are performed to evaluate performance of the proposed method.

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The Study on the Reduction of Laser Scanning Path Creation Time during Jewellery Pattern Manufacturing (쥬얼리 패턴제작시 주사경로생성시간 단축에 관한 연구)

  • Kim, T.H.;Kim, S.Y.;Park, J.D.;Kim, M.J.;Jeon, E.C.
    • Korean Journal of Computational Design and Engineering
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    • v.11 no.6
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    • pp.440-446
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    • 2006
  • This study relates to the effect of forming time of injection path on the total process. The whole process can be divided into build process of forming path of injection and after treatment process. The total time required for the whole process could be reduced by reducing the forming time of injection path using SLC file to correct the problems of STL file that is the basic file format for high speed molding devices. First of all, I verify the forming time of injection path according to the conditions of STL file during the formation of injection path. And I verify problems using STL file during formation of injection path. And then I tried to solve problems of STL file by comparing between the formation time of injection path and the existing method using SLC files.