• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.45 no.9
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• pp.724-733
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• 2017

Accidents caused by upset condition leads to fatal damage to both manned and unmanned aircraft. This paper deals with real-time detection of these aircraft upset situations to prevent further severe situations. Firstly, the difference between sensor measurement and predicted measurement from Extended Kalman filter is monitored to determine whether a target aircraft goes into an upset condition or not. In addition, repeating the time update stage of the Extended Kalman filter for a specific length of time can enable future upset situation prediction. The results of aforementioned both the approaches will build a bridge to upset prevention for future generation of manned/unmanned aircraft.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.11
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• pp.1747-1750
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• 2022

As shrinking the semiconductor process into the deep sub-micron to achieve high-density, low power and high performance integrated circuits, MBU (multiple bit upset) by soft errors is one of the major challenge of on-chip memory systems. To address the MBU, single error correction, double error detection and double adjacent error correction (SEC-DED-DAEC) codes have been recently proposed. But these codes do not resolve mis-correction. We propose the SEC-DED-DAEC-TAED(triple adjacent error detection) code without mis-corrections. The generated H-matrix by the proposed heuristic algorithm to accomplish the proposed code is implemented as hardware and verified. The results show that there is no mis-correction in the proposed codes and the 2-stage pipelined decoder can be employed on-chip memory system.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.417-422
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• 2010

When memory devices are exposed to space environments, they suffer various effects such as SEU(Single Event Upset). Memory systems for space applications are generally equipped with error detection and correction(EDAC) logics against SEUs. In this paper, several error detection and correction codes - RS(10,8) code, (7,4) Hamming code and (16,8) code - are analyzed and compared with each other. Each code is implemented using VHDL and its performances(encoding/decoding speed, required memory size) are compared. Also the failure probability equation of each EDAC code is derived, and the probability value is analyzed for various occurrence rates of SEUs which the STSAT-3 possibly suffers. Finally, the EDAC algorithm for STSAT-3 is determined based on the comparison results.

• Journal of Institute of Control, Robotics and Systems
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• v.13 no.6
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• pp.519-524
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• 2007

The OBC(on-board computer) of a satellite which plays a role of the controller for the satellite should be equipped with preventive measures against transient errors caused by SEU(single event upset). Since memory devices are pretty much susceptible to these transient errors, it is essential to protect memory devices against SFU. A common method exploits an error detection and correction code and additional memory devices, combined with periodic memory scrubbing. This paper proposes an effective memory scrubbing scheme for the OBC of STSAT-2. The memory system of the OBC is briefly mentioned and the reliability of the information stored in the memory system is analyzed. The result of the reliability analysis shows that there exist optimal scrubbing periods achieving the maximum reliability for allowed overall scrubbing overhead and they are dependent on the significance of the information stored. These optimal scrubbing periods from a reliability point of view are derived analytically.

• Aerospace Engineering and Technology
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• v.2 no.1
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• pp.73-79
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• 2003

Usual satellite design adopts hardware Error Detection and Correction (EDAC) circuitary for memory elements to endure proper operation in space radiation environment and periodic read-back(scrubbing) scheme to remove errors occurred and to prevent further accumulation of errors, in parallel, But lack of detail radiation test data upset rates of KOMPSAT-2 mass storage was estimated very worse compared to that of KOMPSAT-1, which was evaluated from very precise radiation test. Although upset rates were evaluated enough low to accommodate by KOMPSAT-2 Flight Software, hardware scrubbing scheme is studied to shorten scrubbing time as well. This paper describes hardware scrubbing architecture having minimum 1.88 minutes scrubbing interval over 1 Gbits memory.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.1023-1026
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• 2013

The electronic equipment which was exposed to high level pulsed radiation is damaged as Upset, Latchup, and Burnout. Those damages has come from the instantaneous photocurrent from electron-hole pairs generated in itself. Such damages appeared as losses of power in military weapon system or of blackout in aerospace equipment and eventually caused in gross loss of national. In this paper, we have implemented a RDC(Radiation detection and control module) as part of the radiation protection technology of the electronic equipment or devices from the pulsed gamma radiation. The RDC which is composed of pulsed gamma-ray detection sensor, signal processors, and pulse generator is designed to protect the important electronic circuits from the pulse radiation. To verify the functionality of the RDC, LM118s which had damaged by the pulse radiation were tested. The test results showed that the test sample applied with a RDC was worked well in spite of the irradiation of the same pulse radiation. Through the experiments we could confirm that the radiation protection technology implemented with RDC had the functionality of radiation protection to the electronic devices.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.4
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• pp.35-41
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• 2008

When memory devices are exposed to a space environment. they suffer various effects such as SEU(Single Event Upset). For these reasons, memory systems for space applications are generally equipped with error detection and correction(EDAC) logics against SEUs. In this paper, the error detection and correction strategy in the Mass Memory Unit(MMU) of the STSAT-3 is discussed. The probability equation of un-recoverable SEUs in the mass memory system is derived when the whole memory is encoded and decoded by the RS(10,8) Reed-Solomon code. Also the probability value is analyzed for various occurrence rates of SEUs which the STSAT-3 possibly suffers. The analyzed results can be used to determine the period of scrubbing the whole memory, which is one of the important parameters in the design of the MMU.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.5
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• pp.1036-1042
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• 2011

This paper presents an algorithm that conducts automatic memory scrubbing operated by dedicated hardwares. The proposed algorithm is designed so that it can scrub entire memory in a given scrub period, while minimally affecting the execution of flight softwares. The scrub controller is constructed in a form of state machines, which have two execution modes - normal mode and burst mode. The deadline event generator and period tick generator are designed in a separate way to support the behavior of the scrub controller. The proposed controller is implemented in VHDL code to validate its applicability. A simple version of the controller is also applied to mass memory modules used in STSAT-3.

• Proceedings of the Korean Information Science Society Conference
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• 2011.06b
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• pp.313-316
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• 2011

SRAM-based FPGAs are very sensitive to single event upset(SEU) induced by space irradiation. To mitigate SEU effects, space applications employ some mitigation schemes. The triple modular redundancy(TMR) is a well-known mitigation scheme. It uses one or three voters as well as three identical blocks performing the same work. The voters can mask out one error in the outputs from the three replicated blocks. One SEU error in TMRed circuits can be masked but it needs to be detected for some reasons such as to analyze the SEU effects in the satellite or to recover the circuits from the error before additional error occur. In this paper, we developed a fault detection circuit and reporting system to detect a fault on the TMRed circuits. To verify our error detection circuit and reporting circuit, we performed an irradiation test at MC-50 Cyclotron. Experimental results showed that error detection circuit can detect a fault on the TMRed test circuit in radiation environment.

• Journal of Power Electronics
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• v.8 no.2
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• pp.181-191
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• 2008

The task performed by induction motors grows increasingly complex in modern industry and hence improvements are sought in the field of fault diagnosis. It is essential to diagnose faults at their very inception, as unscheduled machine down time can upset critical dead lines and cause heavy financial losses. Artificial intelligence (AI) techniques have proved their ability in detection of incipient faults in electrical machines. This paper presents an application of AI techniques for the detection of inter-turn insulation and bearing wear faults in single-phase induction motors. The single-phase induction motor is considered a proto type model to create inter-turn insulation and bearing wear faults. The experimental data for motor intake current, rotor speed, stator winding temperature, bearing temperature and noise of the motor under running condition was generated in the laboratory. The different types of fault detectors were developed based upon three different AI techniques. The input parameters for these detectors were varied from two to five sequentially. The comparisons were made and the best fault detector was determined.