• Title/Summary/Keyword: Up-mixer

Search Result 127, Processing Time 0.022 seconds

The low conversion loss and low LO power V-band MIMIC Up-mixer (낮은 LO 입력 및 변환손실 특성을 갖는 V-band MIMIC Up-mixer)

  • Lee Sang Jin;Ko Du Hyun;Jin Jin Man;An Dan;Lee Mun Kyo;Cho Chang Shik;Lim Byeong Ok;Chae Yeon Sik;Park Hyung Moo;Rhee Jin Koo
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.41 no.12
    • /
    • pp.103-108
    • /
    • 2004
  • In this paper, we present MIMIC(Millimeter-wave Monolithic Integrated Circuit) up-mixer with low conversion loss and low LO power for the V-band transmitter applications. The up-mixer was successfully integrated by using 0.1 ㎛ GaAs pseudomorphic HEMTs(PHEMTs) and coplanar waveguide (CPW) structures. The circuit is designed to operate at RF frequencies of 60.4 GHz, IF frequencies of 2.4 GHz, and LO frequencies of 58 GHz. The fabricated MIMIC up-mixer size is 2.3 mmxl.6 mm. The measured results show that the low conversion loss of 1.25 dB when input signal is -10.25 dBm at LO power of 5.4 dBm. The LO to RF isolation is 13.2 dB at 58 GHz. The fabricated V-band up-mixer represents lower LO input power and conversion loss characteristics than previous reported millimeter-wave up-mixers.

A 3~5 GHz UWB Up-Mixer Block Using 0.18-μm CMOS Technology

  • Kim, Chang-Wan
    • Journal of electromagnetic engineering and science
    • /
    • v.8 no.3
    • /
    • pp.91-95
    • /
    • 2008
  • This paper presents a direct-conversion I/Q up-mixer block, which supports $3{\sim}5$ GHz ultra-wideband(UWB) applications. It consists of a VI converter, a double-balanced mixer, a RF amplifier, and a differential-to-single signal converter. To achieve wideband characteristics over $3{\sim}5$ GHz frequency range, the double-balanced mixer adopts a shunt-peaking load. The proposed RF amplifier can suppress unwanted common-mode input signals with high linearity. The proposed direct-conversion I/Q up-mixer block is implemented using $0.18-{\mu}m$ CMOS technology. The measured results for three channels show a power gain of $-2{\sim}-9$ dB with a gain flatness of 1dB, a maximum output power level of $-7{\sim}-14.5$ dBm, and a output return loss of more than - 8.8 dB. The current consumption of the fabricated chip is 25.2 mA from a 1.8 V power supply.

A RF Frong-End CMOS Transceiver for 2㎓ Dual-Band Applications

  • Youn, Yong-Sik;Kim, Nam-Soo;Chang, Jae-Hong;Lee, Young-Jae;Yu, Hyun-Kyu
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.2 no.2
    • /
    • pp.147-155
    • /
    • 2002
  • This paper describes RF front-end transceiver chipset for the dual-mode operation of PCS-Korea and IMT-2000. The transceiver chipset has been implemented in a $0.25\mutextrm{m}$ single-poly five-metal CMOS technology. The receiver IC consists of a LNA and a down-mixer, and the transmitter IC integrates an up-mixer. Measurements show that the transceiver chipset covers the wide RF range from 1.8GHz for PCS-Korea to 2.1GHz for IMT-2000. The LNA has 2.8~3.1dB NF, 14~13dB gain and 5~4dBm IIP3. The down mixer has 15.5~16.0dB NF, 15~13dB power conversion gain and 2~0dBm IIP3. The up mixer has 0~2dB power conversion gain and 6~3dBm OIP3. With a single 3.0V power supply, the LNA, down-mixer, and up-mixer consume 6mA, 30mA, and 25mA, respectively.

Effect of Mixer Structure on Turbulence and Mixing with Urea-water Solution in Marine SCR System (선박용 SCR 시스템에서 혼합기 구조에 따른 난류유동과 우레아 수용액의 혼합특성)

  • Kim, Tae-Kyoung;Sung, Yon-Mo;Han, Seung-Han;Ha, Sang-Jun;Choi, Gyung-Min;Kim, Duck-Jool
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.36 no.6
    • /
    • pp.814-822
    • /
    • 2012
  • To improve the flow and mixing characteristics of marine SCR system, two different mixer including up-down and swirl type mixer were considered. The purpose of this study is to analyse turbulence intensity and uniformity index in detail and to improve the performance of SCR with respect to the mixer structure. The results showed that, the concentration uniformity index is improved by about 5% with the utilization of both mixers in the front of catalyst part. Although the RMS value and relative turbulence intensity increased after the up-down type mixer, it could observed that the value of two parameters decreased with the flow proceeding forward to the downstream. For the case of swirl type mixer, the decrease of RMS value and relative turbulence intensity were relatively smaller than that of up-down type mixer, and uniform distribution of relative turbulence intensity was observed. As a results, it could be concluded that the mixing effects and the distance of the two kinds of mixer were different.

Monolithic SiGe Up-/Down-Conversion Mixers with Active Baluns

  • Lee, Sang-Heung;Lee, Seung-Yun;Bae, Hyun-Cheol;Lee, Ja-Yol;Kim, Sang-Hoon;Kim, Bo-Woo;Kang, Jin-Yeong
    • ETRI Journal
    • /
    • v.27 no.5
    • /
    • pp.569-578
    • /
    • 2005
  • The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on-chip 1 to 6 GHz up-conversion and 1 to 8 GHz down-conversion mixers using a 0.8 mm SiGe hetero-junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up-conversion mixer was implemented on-chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up-conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down-conversion mixer was implemented on-chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down-conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.

  • PDF

Low Spurious Image Rejection Mixer for K-band Applications

  • Lee, Moon-Que;Ryu, Keun-Kwan;Kim, Hyeong-Seok
    • KIEE International Transactions on Electrophysics and Applications
    • /
    • v.4C no.6
    • /
    • pp.272-275
    • /
    • 2004
  • A balanced single side-band (SSB) mixer employing a sub-harmonic configuration is designed for up and down conversions in K-band. The designed mixer uses anti-parallel diode (APD) pairs to effectively eliminate even harmonics of the local oscillator (LO) spurious signal. To reduce the odd harmonics of LO at the RF port, we employ a balanced configuration for LO. The fabricated chip shows 12$\pm$2dB of conversion loss and image-rejection ratio of about 20dB for down conversion at RF frequencies of 24-27.5GHz. As an up-conversion mode, the designed chip shows 12dB of conversion loss and image-rejection ratio of 20 ~ 25 dB at RF frequencies of 25 to 27GHz. The odd harmonics of the LO are measured below -37dBc.

A 1.8GHz Low Voltage CMOS RF Down-Conversion Mixer (1.8GHz 대역의 저전압용 CMOS RF하향변환 믹서 설계)

  • 김희진;이순섭;김수원
    • Proceedings of the IEEK Conference
    • /
    • 2000.06e
    • /
    • pp.61-64
    • /
    • 2000
  • This paper describes a RF Down-Conversion Mixer for mobile communication systems. This circuit achieves low voltage operation and low power consumption by reducing stacked devices of conventional gilbert cell mixer. In order to reduce stacked devices, we use source-follower structure. The proposed RF Down-Conversion mixer operates up to 1.85GHz at 1.5V power supply with 0.25um CMOS technology and consumes 2.2mA.

  • PDF

2.45GHz CMOS Up-conversion Mixer & LO Buffer Design

  • Park, Jin-Young;Lee, Sang-Gug;Hyun, Seok-Bong;Park, Kyung-Hwan;Park, Seong-Su
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.2 no.1
    • /
    • pp.30-40
    • /
    • 2002
  • A 2.45GHz double-balanced modified Gilbert-type CMOS up-conversion mixer design is introduced, where the PMOS current-reuse bleeding technique is demonstrated to be efficient in improving conversion gain, linearity, and noise performance. An LO buffer is included in the mixer design to perform single-ended to differential conversion of the LO signal on chip. Simulation results of the design based on careful modeling of all active and passive components are examined to explain in detail about the characteristic improvement and degradation provided by the proposed design. Two kinds of chips were fabricated using a standard $0.35\mu\textrm$ CMOS process, one of which is the mixer chip without the LO buffer and the other is the one with it. The measured characteristics of the fabricated chips are quite excellent in terms of conversion gain, linearity, and noise, and they are in close match to the simulation results, which demonstrates the adequacy of the modeling approach based on the macro models for all the active and passive devices used in the design. Above all the benefits provided by the current-reuse bleeding technique, the improvement in noise performance seems most valuable.

An E-Band Compact MMIC Single Balanced Diode Mixer for an Up/Down Frequency Converter (E-대역 상/하향 주파수 변환기용 소형 MMIC 단일 평형 다이오드 혼합기)

  • Jeong, Jin-Cheol;Yom, In-Bok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.22 no.5
    • /
    • pp.538-544
    • /
    • 2011
  • This paper presents a compact single balanced diode mixer fabricated using a 0.1 ${\mu}M$ GaAs p-HEMT commercial process for an E-band frequency up/down converter. This mixer includes a LO balun employing a Marchand balun with a good RF performance. In order to improve the port-to-port isolation, a high pass filter and a low pass filter are include in this mixer at the RF and IF ports, respectively. The fabricated mixer with a very compact size of 0.58 mm2(0.85 mm${\times}$0.68 mm) exhibits a conversion loss of 8~12 dB and an input P1dB of 1~5 dBm at the LO power of 10 dBm from 71~86 GHz.

Design of 1.9GHz CMOS RF Up-conversion Mixer (1.9GHz CMOS RF Up-conversion 믹서 설계)

  • Choi, Jin-Young
    • Journal of IKEEE
    • /
    • v.4 no.2 s.7
    • /
    • pp.202-211
    • /
    • 2000
  • Utilizing the circuit simulator SPICE, we designed a 1.9GHz CMOS up-conversion mixer and explained in detail the simulation procedures including device modeling for the circuit design. Since the measured characteristics of the chip fabricated using the $0.5{\mu}m$ standard CMOS process had shown a big deviation from the characteristics expected by the original simulations, we tried to figure out the proper reasons for the discrepancies. Simulations considering the discovered problems in the original simulations have shown the validity of the simulation method tried for the design. We have shown that the utilized standard CMOS process can be used for the implementation of the chip characteristics similar to those of the equivalent chip fabricated using the GaAs MESFET process.

  • PDF