• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.8
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• pp.72-80
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• 1993

We fabricated 0.3um gate length inverse-T gate MOS(ITMOS) and conventional lightly doped drain oxide spacer MOS(LDDMOS), and studied electrical characteristics for comparison. Threshold voltage of 0.3um gate length device was 0.58 V for ITMOS and 0.6V for LDDMOS. Measured subthreshold characteristics showed a slope of 85mV/decades for both ITLDD and LDDMOS. Maximum transconductance at V S1ds T=V S1gs T=3.3V was 180mS/mm for ITMOS and 163mS/mm for LDDMOS respectively. GIDL current was observed to be 0.1pA/um for ITOMS and 0.8pA/um for LDDMOS. Substrate current of ITMOS as a function of drain current was found to be reduced by a foactor of 2.5 compared with that of LDDMOS.

• Proceedings of the Korea Water Resources Association Conference
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• 2017.05a
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• pp.233-233
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• 2017

현재의 기술과 전문가들의 지식을 바탕으로 수치 예보 모델의 해상도가 점차 증가하고 있으나 한편으로는 해상도가 높아질수록 신뢰성 있는 장기 예보를 제공하는데 어려움이 있다. 즉, 고해상도 모델의 경우 미세한 오차가 발생 하더라도, 실제 기상학적 관점에서 시공간적으로 변동성이 크게 발생할 개연성이 크며, 이로 인해 모델에서 발생하는 불확실성은 더욱 커질 수 있다. 한국 기상청(KMA)에서는 영국기상청으로부터 도입한 통합모델(UM)을 현업 운영하고 있다. 본 연구에서 기상청 통합모델인 UM3.0 예보모델의 예측정확성을 다양한 관점에서 평가하고자 한다. 기상청 UM3.0 모델은 3km의 공간해상도와 1시간 시간해상도를 가지며, 예보시작시점기준 7일간의 예보정보를 제공한다. 강수량 예측정보의 활용성을 평가하기 위해서 예측 시계열에 대해 RMSE, 편의 및 등 다양한 통계지표와 공간적인 강수량 발생 특성을 평가하기 위해서 FSS 방법을 적용하였다. 본 연구 결과를 통해 UM3.0 모델의 1시간 및 3km의 시공간해상도와 선행예보 기간을 그대로 수문학적으로 활용하는 데에는 다소 무리가 있는 것으로 평가되었으며, 이러한 점에서 수문학적 활용관점에서 최적의 시공간적 규모와 선행예보 시간을 분석하였다.

• Journal of Bio-Environment Control
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• v.14 no.2
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• pp.69-75
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• 2005

The storability of chicon was compared by packing it with PE box, wrap, LDPE (low density polyethylene) film that was 25 and 50um thickness, respectively and storing at 1 and $10^{\circ}C$ under light and dark conditions. The visual quality depending on dehydration was deteriorated at more than $2\%$ weight loss during storage. In packing treatments, chicon packed with PE box lost fresh weight to $3\%\;at\;10^{\circ}C\;and\;2\%\;at\;1^{\circ}C$, while non- penetrated film treatment, wrap, 25 and 50um thickness LDPE film, showed less than $1\%$ weight loss. The carbon dioxide concentration in package was $3\~4\%\;in\;50{\mu}m$ LDPE film at $1^{\circ}C\; and\;25um$ LDPE film at $10^{\circ}C$. The ethylene concentration in 50um LDPE film at $1^{\circ}C\;and\;25{\mu}m$ LDPE film at $10^{\circ}C$ was approximately 0.3 ppm and 0.5 ppm, respectively. Chiton stored in dark condition didn't turn to green, but it fumed green only in 3 days at $10^{\circ}C$ and in 6 days at $1^{\circ}C$ under light condition. The greening of chicon was less, the packing materials was thicker. The chlorophyll content represented the degree of greening showed less at $1^{\circ}C$ then at $10^{\circ}C$. The coefficient of correlation(r) between chlorophyll content and carbon dioxide concentration in package was 0.926 at $1^{\circ}C$ and 0.997 at $10^{\circ}C$. The visual quality except greening of packed chicon was maintained at $1^{\circ}C$ better than $10^{\circ}C$, and it was shown highest grade packed with $50{\mu}m$ LDPE film at $1^{\circ}C$ and packed with 25um LDPE film at $10^{\circ}C$. The vitamin C content in packed chicon was kept higher at $1^{\circ}C$ on storage temperatures, and 25um and 50um LDPE film on packing materials. According to these results, it can be proper condition for storage and marketing of chicon that 50um LDPE film at $1^{\circ}C$ and 25um LDPE film at $10^{\circ}C$. And dark condition is necessary to store chicon because it should turn green under tiny light condition.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.11
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• pp.1367-1372
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• 1988

In this paper, we have optimized the computation of the CSP - LOC (Channel Substrate Planar-Large Optical Cavity) structure to design the gith power (Ga, Al) As/GaAs CSP-LOC laser diode. The parameters of the device on the bases of experimental datas include the effects of the various layer thickness, material absorption coefficients, stripe width and so forth. At active layer ($d_2$)=0.08 um with optical layer ($d_3$)=0.5 um and $d_2$ = 0.1 um with $d_3$ = 0.4 um, we find the narrower beam divergence and stable high power in the lowest-order mode without the phenomenon of spatial hole burning. The results of theoretical computation show good agreement with experimental measurements made on LPE grown CSP-LOC. Finally, we developed an practical program and the program is applicable to the CSP-LOC lasers with any materials.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.55-64
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• 2006

This work proposes a calibration-free 14b 70MS/s 0.13um CMOS ADC for high-performance integrated systems such as WLAN and high-definition video systems simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs signal insensitive 3-D fully symmetric layout techniques in two MDACs for high matching accuracy without any calibration. A three-stage pipeline architecture minimizes power consumption and chip area at the target resolution and sampling rate. The input SHA with a controlled trans-conductance ratio of two amplifier stages simultaneously achieves high gain and high phase margin with gate-bootstrapped sampling switches for 14b input accuracy at the Nyquist frequency. A back-end sub-ranging flash ADC with open-loop offset cancellation and interpolation achieves 6b accuracy at 70MS/s. Low-noise current and voltage references are employed on chip with optional off-chip reference voltages. The prototype ADC implemented in a 0.13um CMOS is based on a 0.35um minimum channel length for 2.5V applications. The measured DNL and INL are within 0.65LSB and l.80LSB, respectively. The prototype ADC shows maximum SNDR and SFDR of 66dB and 81dB and a power consumption of 235mW at 70MS/s. The active die area is $3.3mm^2$.

• Proceedings of the Optical Society of Korea Conference
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• 1989.02a
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• pp.140-142
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• 1989

1.54um 파장에서 최대 형광을 나타내는 ZrF4-BaF2-LaF3-AlF3-NaF : ErF3 유리를 built-in-casting 법에 의해 제조하였다. Er+3 이온을 0.2몰부터 4몰까지 첨가하였으며, Er+3 이온의 4I13/2 준위의 lifetime 은 Er+3 이온 0.2몰부터 2몰까지 28msec로 최대값을 갖으며 4몰일때는 급격히 감소하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.4 s.119
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• pp.408-415
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• 2007

A switched-gain controlled LNA is designed and implemented in 0.18 um CMOS technology for $3.1{\sim}4.8\;GHz$ UWB system. In high gain mode, measurement shows a power gain of 12.5 dB, an input IP3 of 0 dBm, while consuming only 8.13 mA of current. In low gain mode, measurement shows a power gain of -8.7 dB, an input IP3 of 9.1 dBm, while consuming only 0 mA of current.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.67-74
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• 2004

In this paper, a 3.3V 8-bit 500MSPS based on an interpolation architecture CMOS A/D converter is designed. In order to overcome the problems of high speed operation, a novel pre-amplifier, a circuit for the Reference Fluctuation, and an Averaging Resistor are proposed. The proposed Interpolation A/D Converter consists of Track ＆ Hold, four resistive ladders with 256 taps, 128 comparators, and digital blocks. The proposed A/D Converter is based on 0.35um 2-poly 4-metal N-well CMOS technology. The A/D Converter dissipates 440 mW at a 3.3 Volt single power supply and occupies a chip area of 2250um x 3080um.

• The Journal of Korean Medicine Ophthalmology and Otolaryngology and Dermatology
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• v.18 no.3
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• pp.18-25
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• 2005

Objectives: It has a growing interest in the prevention and medical treatment of allergic rhinitis. According to many studies, it's known that Sinicheongpye-um has the inhibitory effect on the allergic rhinitis. We have studied effect of the mice on OVA-induced Production of IL-4, IL-5, $Interferone-{\gamma}$ by Murine Splenocytes and effect of OVA-induced Total IgE. Methods: Mixing Ovalbumin(OVA) $10{\mu}g$ into PBS(phoshate buffered saline) and $Al(OH)_3$, gel solution and changing into $1\;m{\ell}$, we made it into OVA solution. That was administered to normal group. After the last administration into abdominal cavity, we caused allergic rhinitis in nasal cavity of mouse of control group and sample group administering 0.1% solution dropwise 3 times a day for 7 days. Keeping separated serum at -20 degree and after refloating spleen cells, cultivating the cells and centrifuging the upper liquid and keeping it at -20 degree, we measured the amount of IL-4. IL-5, $Interferone-{\gamma}$ and OVA-induced Total IgE by ELISA. Results: 1. In Total IgE, Sinichengpae-um treated group was proved significant inhibitory effect.(p<0.05) 2. In IL-4 study, Sinichengpae-um treated group was proved significant inhibitory effect.(p<0.005) 3. In IL-4 study, Sinichengpae-um treated group was proved significant inhibitory effect.(p<0.001) 4. In $Interferone-{\gamma}$ study, Sinichengpae-um treated group showed a increasing tendency. Conclusion: Based on the above result, it is considered that Sinichengpae-um has the inhibitory effect on the allergic rhinitis of mice and suggested thai it could be used in relieving patients of the symptoms which are caused by allergic rhinitis.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.569-572
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• 2014

This paper presents a CMOS switched-capacitor interface circuit for MEMS capacitive sensors. It consist of a capacitance to voltage converter(CVC), a second-order ${\Sigma}{\Delta}$ modulator, and a comparator. A bias circuit is also designed to supply constant bias voltages and currents. This circuit employes the correlated-double-sampling(CDS) and chopper-stabilization(CHS) techniques to reduce low-frequency noise and offset. The designed CVC has a sensitivity of 20.53mV/fF and linearity errors less than 0.036%. The duty cycle of the designed ${\Sigma}{\Delta}$ modulator output increases about 5% as the input voltage amplitude increases by 100mV. The designed interface circuit shows linearity errors less than 0.13%, and the current consumption is 0.73mA. The proposed circuit is designed in a 0.35um CMOS process with a supply voltage of 3.3V. The size of the designed chip including PADs is $1117um{\times}983um$.