• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1399-1400
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• 2008

본 논문에서는 TSMC 0.18um 공정을 이용하여 2.45GHz 대역에서 동작하는 RFID 리더에 적용 할 수 있는 전압제어 발진기를 설계하였다. 위상 잡음 특성 향상을 위해 PMOS, NMOS 소자를 대칭으로 구성한 complementary cross-coupled LC 발진기 구조로 설계 하였고 MOS 배렉터를 이용하여 주파수를 가변 하였다. 또한 공정에서 사용되는 인덕터에 차폐 도체면(PGS:Patterned Ground Shield) 구조를 삽입했을 때 인덕터의 품질계수가 약 5.82% 향상되었고. 이에 따른 위상 잡음은 1MHz offset 주파수에서 PGS를 삽입하지 않는 구조에서는 -102.666dBc/Hz 이며, PGS 구조를 삽입한 구조는 -104.328dBc/Hz로 약1.662dBc 정도의 성능이 향상 되었다. 전압제어 발진기 Core 사이즈는 900um ${\times}$ 590um이고 주파수 가변 범위는 배렉터 전압 1.2${\sim}$2.1V에서 249MHz로 11.4% 특성을 보였다. 1.8V공급전압에서 5.76mW의 전력소모를 보였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.185.1-185.1
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• 2014

본 연구에서는 Electrohydrodynamic (EHD) 젯 프린팅 시스템을 이용하여 graphene이 올려져 있는 유연성 있는 PET 기판 위에 Ag 용액을 그리드로 간격에 따라 타진하였다. Ag 그리드 간격을 200 um, 300 um, 400 um, 500 um로 증가시켰으며, 이때 UV/Vis spectrometry, four-point probe를 이용하여 전기적, 광학적 특성을 분석하였다. Graphene/Ag-grid 하이브리드 투명전극은 그리드 간격 400 um에서 21Ohm/sq.의 면저항과 550 nm에서 84.08%의 투과도를 확인하였다. 또한, graphene/Ag-grid 하이브리드 투명전극의 기계적 응력에 따른 전기적 안정성을 알아보기 위해 radius에 따른 bending, fatigue test와 twist bending, rolling test를 진행하였다. Fatigue bending은 speed 30 mm/s, outer bending radius 20 mm, inner bending radius 22.5 mm로 bending test를 5000번 진행하였으며, twist bending, rolling test를 각각 10000번 진행하였다. 이 결과를 통해 bending-release cycle 조건에서도 초기저항 대비 5% 이내의 매우 우수한 전기적 안정성을 나타냄을 확인하였다. 이러한 graphene/Ag-grid 하이브리드 투명전극의 우수한 특성을 얻음으로써, graphene 박막의 플렉시블 투명전극으로서의 적용가능성을 타진할 수 있었다.

• Proceedings of the KIEE Conference
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• 1987.11a
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• pp.492-495
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• 1987

In this study, PLZT ceramics were fabricated by freeze-drying and normal sintering method. The compositional rate of specimen was selected 9/65/35 (La/Zr/Ti) which have good optical and dielectric properties, sintering time was varied 1, 10, 30, 40, 50, 55, 60 and 65 hr at $1250^{\circ}C$. After sintering, the optical and dielectric properties were investigated with the grain size. As the result of the experiment, freeze-dried powder appeared particle size less than 1 um. The relative dielectric constant was increased linearly with the sintering time, specimen which sintered for 65 hr had the highest value, 5780. Grain was grown with increasing time, in the case of specimen sintered for 60 hr, the grain size was 8.4 um. Transmittance was increased with the grain size. In the case of 8.4 um grain size, the transmittance was 56 %. Curie temperature was decreased linearly by the surface-layer effect of space-charge, in the case of grain size which were 1.8 um and 8.4 um, appeared at $100^{\circ}C$ and $80^{\circ}C$, respectively.

• Journal of Information Display
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• v.7 no.3
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• pp.1-4
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• 2006

2.22-inch qVGA $(240{\times}320)$ amorphous silicon thin film transistor liquid active matrix crystal display (a-Si TFT-AMLCD) panel has been successfully demonstrated employing a 2.5 um fine-patterning technology by a wet etch process. Higher resolution 2.22-inch qVGA LCD panel with an aperture ratio of 58% can be fabricated as the 2.5 um fine pattern formation technique is integrated with high thermal photo-resist (PR) development. In addition, a novel concept of unique a-Si TFT process architecture, which is advantageous in terms of reliability, was proposed in the fabrication of 2.22-inch qVGA LCD panel. Overall results show that the 2.5 um fine-patterning is a considerably significant technology to obtain higher aperture ratio for higher resolution a-Si TFT-LCD panel realization.

• Electrical & Electronic Materials
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• v.1 no.1
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• pp.35-43
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• 1988

In this study, PLZT ceramics were fabricated by the freeze-drying and normal sintering method. The composition rate of the specimen was selected 9/65/35(La/Zr/Ti) which had good optical and dielectric properties, sintering time was varied 1, 10, 30, 50, 55, 60 and 65(hr) at 1250(.deg.C). After sintering, the optical and dielectric properties were investigated with the grain size. As the result of the experiment, the particle size of the powder prepared by freeze-drying method was less than 1(um). The relative dielectric constant was increased linearly with the sintering time and specimen sintered for 65(hr) had the highest value, 5780. Grain was grown with increasing time, in the case of specimen sintered for 60(hr), the grain size was 8.4(um). Transmittance was increased with the grain size. In the case of 8.4(um) grain size, the transmittance was 56(%). Curie temperature was decreased linearly by the surface-layer effect of space-charge. In the case of grain size, 1.8(um), 8.4(um), curie temperatures were appeared at 100(.deg.C) and 80(.deg.C), respectively.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.3
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• pp.540-544
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• 2017

In this study, we analyzed the effects of TID(Total Ionizing Dese) and TREE(Transient Radiation Effects on Electronics) on nMOSFET and pMOSFET fabricated by 0.18um CMOS process. The size of nMOSFET and pMOSFET is 100um/1um(W/L). The TID test was conducted up to 1 Mrad(Si) with a gamma-ray(Co-60). During the TID test, the nMOSFET generated leakage current proportional to the applied dose, but that of the pMOSFET was remained in a steady state. The TREE test was conducted at TEST LINAC in Pohang Accelerator Laboratory with a maximum dose-rate of $3.16{\times}10^8rad(si)/s$. In that test nMOESFET generated a large amount of photocurrent at a maximum of $3.16{\times}10^8rad(si)/s$. Whereas, pMOSFETs showed high TREE immunity with a little amount of photocurrent at the same dose rate. Based on the results of this experiment, we will progress the research of the radiation hardening for CMOS unit devices.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.4
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• pp.208-211
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• 2018

This paper details the design of a 1,200 V class trench gate field stop IGBT (insulated gate bipolar transistor) with a nano gate structure smaller than 1 um. Decreasing the size is important for lowering the cost and increasing the efficiency of power devices because they are high-voltage switching devices, unlike memory devices. Therefore, in this paper, we used a 2-D device and process simulations to maintain a gate width of less than 1 um, and carried out experiments to determine design and process parameters to optimize the core electrical characteristics, such as breakdown voltage and on-state voltage drop. As a result of these experiments, we obtained a wafer resistivity of $45{\Omega}{\cdot}cm$, a drift layer depth of more than 180 um, an N+ buffer resistivity of 0.08, and an N+ buffer thickness of 0.5 um, which are important for maintaining 1,200 V class IGBTs. Specially, it is more important to optimize the resistivity of the wafer than the depth of the drift layer to maintain a high breakdown voltage for these devices.

• Korean Journal of Materials Research
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• v.26 no.2
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• pp.95-99
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• 2016

In this study, 5 um sized $ZrSiO_4$ was ground to 1.9 um, 0.3 um, and 0.1 um sized powders by wet high energy milling process, and the sintering characteristics were observed. Pure $ZrSiO_4$ itself can-not be sintered to these levels of theoretical density, but it was possible to sinter $ZrSiO_4$ powder of nano-scale size of, -0.1 um to the theoretical density and to lower the sintering temperature for full density. Also, the decomposition of $ZrSiO_4$ with a size in the micron range resulted in the formation of monoclinic $ZrO_2$; however, in the nano sized range, the decomposition resulted in the tetragonal phase of $ZrO_2$. So, it was possible to improve the sintering characteristics of nano-sized $ZrSiO_4$ powders.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.319-322
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• 1998

A 20 GHz 2-stage MMIC (Monolithic Microwave Integrated Circuits) LNA(Low Noise Amplifiers) has been designed. The pHEMT with gate length of 1.15 um has been used to provide ultra low noise and high gain amplification. Series and Shunt feedback circuits were interted to ensured high stability over frequency range of DC to 60 GHz. The size of designed MMIC LNA is 2285um x 2000um(4.57mm2). The simulated noise figure of MMIC LNA is less than 1.7 dB over frequency range of 20 GHz to 21 GHz.

• Journal of the Korean Data and Information Science Society
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• v.17 no.2
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• pp.529-536
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• 2006

Investigators use either Euclidean distance or volume of a simplex defined composed of data points as agreement index to measure chance-corrected agreement among observers for multivariate interval data. The agreement coefficient proposed by Um(2004) is based on a volume of a simplex and does not depend on the variables' measuring units. We consider a comparison of Um(2004)'s agreement coefficient with others based on two unit-free distance measures, Pearson distance and Mahalanobis distance. Comparison among them is made using hypothetical data set.