• Title/Summary/Keyword: UM

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Single-panel simulation on liquid crystal on silicon

  • Liao, Engle;Chiu, Jack;Peng, James
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.939-942
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    • 2004
  • In this study, we report simulation results of single-panel LCOS (liquid crystal on silicon). Reflective LCOS microdisplays are widely used in various projection and near-eye application. For one panel system, liquid crystal response time is an important variable. The panel must switch fast enough to support the display of Field color sequential with high field rates. In order to have fast response and good contrast, a vertical alignment (VA) cell was used in this study. With suitable selection on LC parameters like temperature, viscosity, elastic constant and birefringence, it is possible to get response time of around 2ms from a 2.0 um-thick vertical alignment cell. This result also indicates an ease of production control on 2.0 um cells than 1.0 um cells.

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CMOS on-chip voltage and current reference circuits for low-voltage applications (저전압용 CMOS 온-칩 기준 전압 및 전류 회로)

  • 김민정;이승훈
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.4
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    • pp.1-15
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    • 1997
  • This paper proposes CMOS on-chip voltage and current reference circuits that operate at supply voltages between 2.5V and 5.5V without using a vonventional bandgap voltage structure. The proposed reference circuits based on enhancement-type MOS transistors show low cost, compatibility with other on-chip MOS circuits, low-power consumption, and small-chip size. The prototype was implemented in a 0.6 um n-well single-poly double-metal CMOS process and occupies an active die area of $710 um \times 190 um$. The proposed voltage reference realizes a mean value of 0.97 V with a standard deviation of $\pm0.39 mV$, and a temperature coefficient of $8.2 ppm/^{\circ}C$ over an extended temeprature range from TEX>$-25^{\circ}C$ to $75^{\circ}C$. A measured PSRR (power supply rejection ratio) is about -67 dB at 50kHz.

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Development of the Korean Aviation Turbulence Guidance (KTG) System using the Operational Unified Model (UM) of the Korea Meteorological Administration (KMA) and Pilot Reports (PIREPs) (기상청 현업 통합모델과 조종사기상보고 자료를 이용한 한국형 항공난류 예측시스템 개발)

  • Kim, Jung-Hoon;Chun, Hye-Yeong
    • Journal of the Korean Society for Aviation and Aeronautics
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    • v.20 no.4
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    • pp.76-83
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    • 2012
  • Korean aviation Turbulenc Guidance (KTG) system is developed using the operational unified model (UM) of the Korea Meteorological Administration (KMA) and pilot reports (PIREPs) over East Asia. The KTG system comprised of twenty turbulence diagnostics that represent various turbulence potentials and have the best forecasting skills, which are combined into a single ensemble-averaged index, namely KTG, at upper-(above FL250) and mid-(below FL250) levels. It is found that the overall performance of the KTG is higher than those produced from the one single best index, and satisfies the minimum criteria (80% accuracy) that the system is operationally useful in aviation industry.

Each Nozzle Control for Optimum Formation of Ink Drop of Piezoelectric Printing Head (압전 프린트헤드의 잉크드롭 최적형성을 위한 각 노즐제어)

  • Choi, Geun-Soo;Youn, Shin-Yong;Baek, Soo-Hyun;Kim, Yong
    • Proceedings of the KIEE Conference
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    • 2006.10d
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    • pp.215-217
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    • 2006
  • 본 논문에서는 잉크젯 프린팅 기술을 이용한 산업용 FPCB의 패턴형성을 위한 잉크드롭의 최적형성을 연구목적으로 하였다. 이를 위하여 압전헤드에 대한 구동특성을 해석하였으며 드롭형성을 위한 전압파형의 크기, 펄스폭, 기울기(감속)조정을 통하여 잉크드롭을 최적으로 형성하도록 제어기(FPGA)를 구성하였으며 실험결과를 통하여 잉크의 최적형성 과정을 확인할 수 있었으며 잉크 드롭시 1[mm]에 ${\pm}10$[um]의 드롭오차를 ${\pm}2$[um]까지 감소시켜 50[um]패턴을 프린트하였다.

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Optimization for High Efficiency of Point Contact Solar Cell (후면전극형 태양전지의 고효율화를 위한 최적화 연구)

  • Ahn, Byoung-Sub;Kang, Ey-Goo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.5
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    • pp.345-350
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    • 2011
  • This paper was carried about optimization for high efficiency of point contact solar cell. We have studied on the characteristics of power converter according to each parameter for the optimization for high efficiency of point contact solar cell on this study. We have 25.1352% of convert efficiency after adapt optimal parameters as mentioned in point body and superior conclusion is drawn by comparison with general efficiency has within 20%. At this time, the value of parameter is 100 um cell pitch, 0.01 um AR coating, 0.9 um N+ FSF thickness., etc. This study will continue to go on for optimization for efficiency in future, as it looks now, the results of this study would contribute to the business of high efficiency of point contact solar cell.

A study for position control algorism improvement of register controller which uses the Image process (영상처리를 이용한 레지스터 컨트롤러의 위치제어 알고리즘 개선에 관한 연구)

  • Jung, Hoon;Lee, Duck-Hyoung;Yun, Eui-Jung;Hong, Sun-Ki
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.1705_1706
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    • 2009
  • 기존 레지스터컨트롤러는 스케닝 헤드를 이용하여 인쇄를 하였으나 기존 인쇄방법은 펄스의 시간과 시간차를 이용하여 인쇄물의 에러의 차이를 보여줬다. 기존의 스케닝 헤드식 레지스터컨트롤러는 오차가 100[um]인 반면에 영상처리를 이용함으로인해 오차의 범위를 10[um]로 보다 정밀하게 인쇄를 할 수 있으며 이는 전자인쇄 오차 범위안에 들어간다. 그리하여 본 논문에서는 영상처리를 이용하여 오차의 범위를 10[um] 이내로 들어오게 하는 위치제어알고리즘에 대하여 연구하려 한다.

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1.485Gb/s Tranceiver Design for HDTV Camera System using 0.25um CMOS Process (0.25um CMOS를 이용한 고해상도 TV용 1.485Gb/s 직/병렬화기의 설계)

  • Ryoo, Ji-Yeoul;Hong, Young-Uk;Choi, Bae-Kun;Cho, Gyu-Hyung
    • Proceedings of the KIEE Conference
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    • 1999.11c
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    • pp.736-738
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    • 1999
  • 본 논문은 HDTV camera에 응용할 수 있는 직/병렬화기에 관한 것이다. 송신단은 camera에서 만들어진 영상 음성 및 제어 74.25Mb/s 20bit 병렬 데이터를 1.485Gb/s의 직렬 데이터로 변환하여 송신하고 수신단은 수신된 직렬 데이터에서 클럭을 추출한 뒤 원래의 74.25Mb/s 20bit 병렬 데이터로 복원한다. 0.25um CMOS공정을 이용하여 설계하였으며 2.5V 단일 전원에서 총 615mW의 전력을 소모한다.

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A Design of CMOS Subbandgap Reference using Pseudo-Resistors (가상저항을 이용한 CMOS Subbandgap 기준전압회로 설계)

  • Lee, Sang-Ju;Lim, Shin-Il
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.609-611
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    • 2006
  • This paper describes a CMOS sub-bandgap reference using Pseudo-Resistors which can be widely used in flash memory, DRAM, ADC and Power management circuits. Bandgap reference circuit operates weak inversion for reducing power consumption and uses Pseudo-Resistors for reducing the chip area, instead of big resistor. It is implemented in 0.35um Standard 1P4M CMOS process. The temperature coefficient is 5ppm/$^{\circ}C$ from $40^{\circ}C$ to $100^{\circ}C$ and minimum power supply voltage is 1.2V The core area is 1177um${\times}$617um. Total current is below 2.8uA and output voltage is 0.598V at $27^{\circ}C$.

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A Low-Noise and Small-Size DC Reference Circuit for High Speed CMOS A/D Converters

  • Hwang, Sang-Hoon;Song, Min-Kyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.1
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    • pp.43-50
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    • 2007
  • In a high-speed flash style or a pipelining style analog-to-digital converter (A/D converter), the DC reference fluctuation caused by external noises becomes serious, as the sampling frequency is increased. To reduce the fluctuations in conventional A/D converters, capacitors have been simply used, but the layout area was large. Instead of capacitors, a low-noise and small-size DC reference circuit based on transmission gate (TG) is proposed in this paper. In order to verify the proposed technique, we designed and manufactured a 6-bit 2GSPS CMOS A/D converter. The A/D converter is designed with a 0.18um 1-poly 6-metal n-well CMOS technology, and it consumes 145mW at 1.8V power supply. It occupies the chip area of 977um by 1040um. The measured result shows that SNDR is 36.25 dB and INL/DNL is within 0.5LSB, even though the DC reference fluctuation is serious.

A STUDY ON THE CUT-OFF CONDITION OF THE FUNDAMENTAL MODE IN MONOMODE FIBERS (단일 모드 FIBER에서 기본 MODE의 차단파장 조건에 관한 연구)

  • 김상준;김형태;김기대
    • Proceedings of the Korean Institute of Communication Sciences Conference
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    • 1986.10a
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    • pp.23-27
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    • 1986
  • In this paper, The loss spectra between 1.1um and 1.7um were measured by cut-back method using tungsten-halogen lamp, a grating monochramator and an InGaAs detector. Typical fiber lengths measured were 30 meter. This result represent a further contribution to monomode fiber design and has been applied to come common profimes that are under study to optimize the fiber performance. It is very important that the parameter a. were designed more exactly and transmission of LPol mode in 1.55um. Therefore, Fiber designer have to be aware of the fact that this coupling loss and bending loss.

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