• Korean Journal of Materials Research
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• v.3 no.6
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• pp.593-597
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• 1993

Adhesion of CVD W to the TiN glue layer in the blanket W process which is a promising candidate for filing contact holes in subhalfmicron ULSIs has been investigated. The adhesion was enhanced with increasing the W film thickness due to the decrease of the TiN film stress. The adhesion strength was increased by the sputter etching of the TiN surface prior to the W deposition owing to the removal of contaminants and the increase of the surface roughness. The adhesion of the W film to the TiN glue layer property was also improved by Ar ion implantation of the TiN surface owing to the activation of the TiN surface.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.3
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• pp.169-181
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• 2011

In this present paper, a comprehensive drain current model incorporating the effects of channel length modulation has been presented for multi-layered gate material engineered trapezoidal recessed channel (MLGME-TRC) MOSFET and the expression for linearity performance metrics, i.e. higher order transconductance coefficients: $g_{m1}$, $g_{m2}$, $g_{m3}$, and figure-of-merit (FOM) metrics; $V_{IP2}$, $V_{IP3}$, IIP3 and 1-dB compression point, has been obtained. It is shown that, the incorporation of multi-layered architecture on gate material engineered trapezoidal recessed channel (GME-TRC) MOSFET leads to improved linearity performance in comparison to its conventional counterparts trapezoidal recessed channel (TRC) and rectangular recessed channel (RRC) MOSFETs, proving its efficiency for low-noise applications and future ULSI production. The impact of various structural parameters such as variation of work function, substrate doping and source/drain junction depth ($X_j$) or negative junction depth (NJD) have been examined for GME-TRC MOSFET and compared its effectiveness with MLGME-TRC MOSFET. The results obtained from proposed model are verified with simulated and experimental results. A good agreement between the results is obtained, thus validating the model.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.8
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• pp.26-34
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• 1997

To develop ultrathin gate oxide for ULSI MOSFETs, for the first time, we fabricated MOS capacitors with 65.angs. thick initial oxide grown by high pressure oxidation (HIPOX) at 700.deg. C in 5 atmosphere $O_{2}$ ambient and then followed by rapid thermal nitridation (RTN) in N$_{2}$O ambient. The dielectric breakdown fields of the initial HIPOX oxide are 13.0 MV/cm and 13.8MV/cm for negative and positive gate bias, respectively and are dependent on nitridation temeprature and time.The lifetimes of the HIPOX oxides extractd by TDDB method are 1.1*10$^{8}$ sec and 3.4 * 10$^{9}$ sec for negative and positive stress current, respectively. The lifetime of the HIPOX oxide dfor negative stress current increases with nitridation time in N$_{2}$O ambient at 1100.deg.C, reaching maximum value stress curretn increases with nitridation time in N$_{2}$O ambient at 1100.deg. C reacing maximum value of 1.2*10$^{9}$ sec for 30 sec of nitridation time, and then subsequently decreases at the longer nitridation time. The lifetimes of the nitrided-HIPOX oxides are longer than 10 years when nitridations are carried out longer than about 50 sec and 12 sec at 1000.deg. C, and 1100.deg. C, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05d
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• pp.109-112
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• 2003

Recently, CMP (Chemical mechanical polishing) technology has been widely used for global planarization of multi-level interconnection for ULSI applications. However, COO (cost of ownership) and COC (cost of consumables) were relatively increased because of expensive slurry. In this paper, we have studied the possibility of recycle of reused silica slurry in order to reduce the costs of CMP slurry. Also, we have collected the silica abrasive powders by filtering after subsequent CMP process for the purpose of abrasive particle recycling. And then, we annealed the collected abrasive powders to promote the mechanical strength of reduced abrasion force. Finally, we compared the CMP characteristics between self-developed KOH-based silica abrasive slurry and original slurry. As our experimental results, we obtained the comparable removal rate and good planarity with commercial products. Consequently, we can expect the saving of high cost slurry.

• Journal of the Korean Vacuum Society
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• v.10 no.4
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• pp.403-410
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• 2001

Acceleration in integration density and speed performance of ULSI circuits require miniaturization of CMOS and interconnections as well as higher current density capabilities for transistors. A leading candidate to substitute Al-alloy is Cu, which has lower resistivity and higher melting point. So we can expect much higher electromigration resistance. In this paper, we are going to explain the major features of EM for MOCVD Cu according to variant conditions. We compared the life time and activation energy of MOCVD Cu with those of I-beam Cu and AA in the same conditions. The electromigration experiments were performed with Cu/Al/TiN multilayer. Experimental results shows that the deposition rate and electromigration characteristics of Cu thin film were improved by the Al interlayer.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.829-831
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• 1992

Ultrathin metal-oxide-semiconductor(MOS) gate dielectrics have been fabricated by conventional thermal oxidation in $N_2O$ ambient. Compared to oxides grown in $O_2$, $N_2O$ oxides exhibit significantly low flatband voltage and small shift in flatband voltage. $N_2O$ oxidation induces a slight decrease in mobile ionic charge density($N_m$), fixed charge density($N_f$) and surface state charge density($N_{ss}$). This study establishes that $N_2O$ oxides may have a great impact on future MOS ULSI technology in which ultrathin gate dielectrics are required.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.835-838
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• 1992

The $TiN/TiSi_2$ bilayer has been studied for contact barrier layer at ULSI recently. The $TiN/TiSi_2$ bilayer was formed by RTA in $NH_3$ ambient simultaneously after the Ti film was deposited on silicon substrate. In this paper, properties of $TiN/TiSi_2$ bilayer was evaluated according to $BF_2$ dopant concentration and dopant redistribution in $TiN/TiSi_2$ bilayer was also analyzed. In this experiment, the composition and structure of $TiN/TiSi_2$ bilayer were constant even though dopant concentration increased but silicide growth rate decreased. Boron atoms were redistributed within TiN film and at $TiSi_2Si$ interface during the bilayer formation.

• Journal of the Korean Vacuum Society
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• v.7 no.3
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• pp.255-260
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• 1998

The ionized magnetron sputtering is very useful in filling of small metal contact or via in ULSI processing with very high ionization upto 80% based on incoming flux ratio. But fairly high sputtering gas pressure is required to get high ionization, which instead gives low deposition rate and diverse incoming neutral's angular distribution. The electron quenching by heavily sputtered metals and gas rarefaction were considered the main causes of decreased ionization in this process. RF pulsing of sputtering power was proposed to solve those two problems. The results showed that 10㎳/10 ㎳ and 100㎳/100 ㎳ of on/off pulsings were optimal pulse conditions from OES measurements and also XRD of deposited Ag film showed distinct change of (111) to (200) preferred orientation. These results were analysed in a view point of neutral gas heating and cooling by high power sputtering.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.3
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• pp.128-132
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• 2004

The perovskite ferroelectric materials of the PZT, SBT and BST series will attract much attention for application to ULSI devices. Among these materials, the BST ($Ba_0.6$$Sr_0.4$/$TiO_3$) is widely considered the most promising for use as an insulator in the capacitors of DRAMS beyond 1 Gbit and high density FRAMS. Especially, BST thin films have a good thermal-chemical stability, insulating effect and variety of Phases. However, BST thin films have problems of the aging effect and mismatch between the BST thin film and electrode. Also, due to the high defect density and surface roughness at grain boundarys and in the grains, which degrades the device performances. In order to overcome these weakness, we first applied the chemical mechanical polishing (CMP) process to the polishing of ferroelectric film in order to obtain a good planarity of electrode/ferroelectric film interface. BST ferroelectric film was fabricated by the sol-gel method. And then, we compared the surface characteristics before and after CMP process of BST films. We expect that our results will be useful promise of global planarization for FRAM application in the near future.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.380-381
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• 2006

Chemical mechanical polishing (CMP) technology has been widely used for global planarization of multi-level interconnection for ULSI applications. However, the cost of ownership and cost of consumables are relatively high because of expensive slurry. In this paper, we studied the mixed abrasive slurry (MAS). In order to save the costs of slurry, the original silica slurry was diluted by de-ionized water (DIW). And then, $ZrO_2$, $CeO_2$, and $MnO_2$ abrasives were added in the diluted slurry in order to promote the mechanical force of diluted slurry. We have also investigate the possibility of mixed abrasive slurry for the oxide CMP application.