• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.12B
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• pp.2016-2024
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• 2000

본 논문에서는 결함의 영향을 받지 않고 동작할 수 있는 AVTMR(All Voting Triple Modular Redundancy) 시스템을 개발하였으며, MILSPEC-217F에 기반을 둔 고장율을 계산하여 AVTMR과 SS(Single System) 시스템을 비교 및 평가하였다. 설계된 시스템은 MC68000을 기반으로 한 3중화된 다수결 보터(Triplicated Majority Voter)를 이용하여 시스템을 개발하였다. 본 논문에서는 시스템의 신뢰도(Reliability), 가용도(Avaliability), 유지보수도(Maintainability)를 마코브 모델(Markov model)로 평가하였으며, 또한 시스템의 MTTF(Mean Time to Failure)를 계산하여 시스템의 수명을 구하였고, 설계된 AVTMR 시스템이 SS(Single System)보다 전체 시스템 평가에서 우수한 특성을 가진다는 것을 시뮬레이션을 통해 알 수 있었다. 또한, AVTMR 시스템은 결함을 허용(Fault tolerant)하는 시스템 특성을 가지기 때문에, 인간의 생명과 관련된 철도 시스템, 선박 시스템이나 항공기 시스템에 적용될 수 있다.

• Proceedings of the KIEE Conference
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• 1999.07b
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• pp.731-733
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• 1999

Distributed Control System has been used for large scale and critical system control such as aerospace industries, chemical and power plant and so on. It is very impotant factors for design of the control system to be reliable and fault-tolerant. These control systems have backup or redundant processing modules for minimizing the time of failure and improving reliability. But such methods have changeover duration from faulty module to healthy one. During that interval, feedback control loop raises bumper and performance of the system become worse. TMR(Triple Modular Redundancy) control system is one of the best reliable ones that can overcome such a mortal drawback. This paper analyzes the components of TMR system functionally and proposes practical and cost effective configuration method for turbine control of thermal power plant.

• Proceedings of the KSR Conference
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• 2011.05a
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• pp.1195-1201
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• 2011

Since the release of safety standard IEC 61508 which defines functional safety of electronic safety-related systems, SIL(Safety Integrity Level) certification for railway systems has gained lots of attention lately. In this paper, we propose a new design technique of the computer board for train control systems with high reliability and safety. The board is designed with TMR(Triple Modular Redundancy) using a certified SIL3 Texas Instrument(TI)'s TMS570 MCU(Micro-Controller Unit) to guarantee safety and reliability. TMR for the control device is implemented on FPGA(Field Programmable Gate Array) which integrates a comparator, a CAN(Controller Area Network) communication module, built-in self-error checking, error discriminant function to improve the reliability of the board. Even if a malfunction of a processing module occurs, the safety control function based on the proposed technique lets the system operate properly by detecting and masking the malfunction. An RTOS (Real Time Operation System) called FreeRTOS is ported on the board so that reliable and stable operation and convenient software development can be provided.

• Proceedings of the Korean Information Science Society Conference
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• 2011.06b
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• pp.313-316
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• 2011

SRAM-based FPGAs are very sensitive to single event upset(SEU) induced by space irradiation. To mitigate SEU effects, space applications employ some mitigation schemes. The triple modular redundancy(TMR) is a well-known mitigation scheme. It uses one or three voters as well as three identical blocks performing the same work. The voters can mask out one error in the outputs from the three replicated blocks. One SEU error in TMRed circuits can be masked but it needs to be detected for some reasons such as to analyze the SEU effects in the satellite or to recover the circuits from the error before additional error occur. In this paper, we developed a fault detection circuit and reporting system to detect a fault on the TMRed circuits. To verify our error detection circuit and reporting circuit, we performed an irradiation test at MC-50 Cyclotron. Experimental results showed that error detection circuit can detect a fault on the TMRed test circuit in radiation environment.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.38 no.4
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• pp.389-394
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• 2010

This paper describes the conceptual design of mass memory unit for high speed data processing and mass memory management in the STSAT-3 compared to that of STSAT-2. The FPGA directly controls the data receiving from two payloads with the maximum 100Mbps speed and 32Gb mass memory management to satisfy these requirements. We used SRAM-based FPGA from XILINX having fast operating speed and large logic cells. Therefore, the Triple Modular Redundancy(TMR) and configuration memory scrubbing techniques will also be used to protect FPGA from Single Event Upset(SEU) in space.

• Journal of Institute of Control, Robotics and Systems
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• v.20 no.6
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• pp.689-694
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• 2014

An SPLC (Safety Programmable Logic Controller) must be designed to meet the highest safety standards, IEEE 1E, and should guarantee a level of fault-tolerance and high-reliability that ensures complete error-free operation. In order to satisfy these criteria, I/O modules, communication modules, processor modules and bus modules of the SPLC have been configured in triple or dual modular redundancy. The redundant modules receive the same data to determine the final data by the voting logic. Currently, the processor of each rx module performs the voting by deciding on the final data. It is the intent of this paper to prove the improvement on the current system, and develop a voting system for multiple data on a system bus level. The new system bus protocol is implemented based on a TCN-MVB that is a deterministic network consisting of a master-slave structure. The test result shows that the suggested system is better than the present system in view of its high utilization and improved performance of data exchange and voting.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.10A
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• pp.1546-1554
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• 1999

In this paper, Dynamic Fault Tree algorithm(DFT algorithm) is presented. This algorithm provides a concise representation of dynamic fault tolerance system including fault recovery techniques with fault detection, mask and switching function. And this algorithm define FDEP, CSP, SEQ, PAG gate which captures the dynamic characteristics of system. It show that this algorithm solved the constraints to satisfy the dynamic characteristics of system which there are in Markov and also this is able to satisfy the dynamic characteristics of system which there are in Markov and also this is able to covered the disadvantage of Fault tree methods. To show the key advantage of this algorithm, a traditional method, that is, Markov and Fault Tree, applies to TMR and Dual-Duplex systems with the dynamic characteristic and a presented method applies to those. He results proved that the DFT algorithm for solving the problems of the system is more effective than the Markov and Fault tree analysis model..