• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.5
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• pp.56-63
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• 2009

The IEEE 802.11 standard has been used for wireless data networks such as wireless LAN, ad-hoc network, and vehicular ad-hoc network. Thus, the performance analysis of the IEEE 802.11 specification has been one of the hottest issues for network optimization and resource management. Most of the analysis studies were performed in a data plane of the IEEE 802.11 unicast. However, IEEE 802.11 broadcast is widely used for topology management, path management, and data dissemination. Thus, it is important to understand the performance of the broadcast scheme for the design of efficient wireless data network. In this contort, we analyze the IEEE 802.11 broadcast scheme in terms of the broadcast frame reception probability according to the distance from a sending node. Unlike the other works, our analysis framework includes not only the system parameters of the IEEE 802.11 specification such as transmission range, data rate, minimum contention window but also the networking environments such as the number of nodes, network load, and the radio propagation environments. Therefore, our analysis framework is expected to be used for the development of protocols and algorithms in a dynamic wireless data network.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.10 s.101
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• pp.1050-1058
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• 2005

This paper presents how to design and implement a very compact, cost effective and broad band receiver module for IEEE 802.16 FWA(Fixed Wireless Access) in the 40 GHz band. The presented receiver module is fabricated in a multi-layer LTCC(Low Temperature Cofired Ceramic) technology with cavity process to achieve excellent electrical performances. The receiver consists of two MMICs, low noise amplifier and sub-harmonic mixer, an embedded image rejection filter and an IF amplifier. CB-CPW, stripline, several bond wires and various transitions to connect each element are optimally designed to keep transmission loss low and module compact in size. The LTCC is composed of 6 layers of Dupont DP-943 with relative permittivity of 7.1. The thickness of each layer is 100 um. The implemented module is $20{\times}7.5{\times}1.5\;mm^3$ in size and shows an overall noise figure of 4.8 dB, an overall down conversion gain of 19.83 dB, input P1 dB of -22.8 dBm and image rejection value of 36.6 dBc. Furthermore, experimental results demonstrate that the receiver module is suitable for detection of Digital TV signal transmitted after up-conversion of $560\~590\;MHz$ band to 40 GHz.

• Journal of Korean Tunnelling and Underground Space Association
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• v.22 no.4
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• pp.383-399
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• 2020

Optimizing the spacing of the disc cutter is a key element in the design of the TBM cutter head, which determines the drilling performance of the TBM. The full-scale linear cutting test is known as the most reliable and accurate test for calculating the spacing of the disc cutter, but it has the disadvantage of costly and time-consuming for the full-scale experiment. In this study, through the numerical analysis study based on the discrete element method, the tendency between Specific Energy-S/P ratio according to uniaxial compression strength and penetration depth of rock was analyzed, and the optimum spacing of 17-inch disc cutter was derived. To examine the appropriateness of the numerical analysis model, the rolling force acting on the disc cutter was compared and reviewed with the CSM model. As a result of numerical analysis for the linear cutting test, the rolling force acting on the disc cutter was analyzed to be similar to the rolling force derived from the theoretical formula of the CSM model. From the numerical analysis on 5 UCS cases (50 MPa, 70 MPa, 100 MPa, 150 MPa, 200 MPa), it is found that the range of the optimum spacing of the disc cutter decreases as the rock strength increases. And it can be concluded that 80~100 mm of disc cutter spacing is the optimum range having minimum specific energy regardless of rock strength. This tends to coincide with the optimal spacing of previously reported disk cutters, which underpins the disk cutter spacing calculated through this study.

• Journal of IKEEE
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• v.24 no.2
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• pp.654-660
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• 2020

Through the output of brain waves during muscle operation, this paper checks whether it is possible to find characteristic vectors of brain waves that are capable of dividing left and right movements by extracting brain waves in specific areas of muscle signal output that include the motion of the left and right muscles or the will of the user within EEG signals, where uncertainties exist considerably. A typical surface EMG and noninvasive brain wave extraction method does not exist to distinguish whether the signal is a motion through the degree of ionization by internal neurotransmitter and the magnitude of electrical conductivity. In the case of joint and motor control through normal robot control systems or electrical signals, signals that can be controlled by the transmission and feedback control of specific signals can be identified. However, the human body lacks evidence to find the exact protocols between the brain and the muscles. Therefore, in this paper, efficiency is verified by utilizing the results of application of CSP (Common Spatial Pattern) filter to verify that the left-hand and right-hand signals can be extracted through brainwave analysis when the subject's behavior is performed. In addition, we propose ways to obtain data through experimental design for verification, to verify the change in results with or without filter application, and to increase the accuracy of the classification.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.3
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• pp.3-12
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• 2015

Recently, various studies have been attempted to provide a biological information monitoring service through integrating with the web service. The medical information transmission standard ISO/IEEE 11073 PHD defines the optimized exchange protocol ISO/IEEE 11073-20601 based on the No-IP to exchange the biometric information between the ISO/IEEE 11073 agent and the manager. It's system structure based on the No-IP using ISO/IEEE 11073-20601 is not suitable for providing a remote biological information monitoring services. That is because it is difficult to provide to control and manage the biological information measurement devices, which have installed IP protocol stack at the remote. Furthermore, ACSE and CMDISE in ISO/IEEE 11073-20601 are not suitable to provide U-healthcare services based on IoT because they are complicated and difficult to implement it caused by the structural complexity. In order to solve the problems, in this paper, we propose the biological information monitoring architecture based on ISO/IEEE 11073 DIM/REST of IoT environment to provide the biological information monitoring service based on IoT. To do this, we designed biological information monitoring system architecture based on IoT and the message exchange protocol of ISO/IEEE 11073 DIM/REST between the ISO/IEEE 11073 agent and the ISO/IEEE 11073 manager. In order to verify the realistic possibility of the proposed system architecture, we developed the service prototype.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.28-37
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• 2010

In this paper, the IC (Integrated Circuit) for multi-channel asynchronous communication was designed by using FPGA and VHDL language. The existing chips for asynchronous communication that has been used commercially are composed of one to two channels. Therefore, when communication system with two channels or more is made, the cost becomes high and it becomes complicated for communication system to be realized and also has very little buffer, load that is placed into Microprocessor increases heavily in case of high speed communication or transmission of high-capacity data. The designed IC was improved the function and performance of communication system and reduced costs by designing 8 asynchronous communication channels with only one IC, and it has the size of transmitter/receiver buffer with 256 bytes respectively and consequently high speed communication became possible. To detect errors between communications, it was designed with digital filter and check-sum logic and channel MUX logic so that the malfunction can be prevented and errors can be detected more easily and input/output port regarding each communication channel can be used flexibly and consequently the reliability of system was improved. It was composed and simulated logic of VHDL described by using Cyclone II Series EP2C35F672C8 and QuartusII V8.1 of ALTERA company. In order to show the performance of designed IC, the test was conducted successfully in QuartusII simulation and experiment and the excellency was compared with TL16C550A of TI (Texas Instrument) company and ATmegal28 general-purpose micro controller of ATMEL company that are used widely as chips for asynchronous communication.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.9
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• pp.68-73
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• 2013

In this paper, we proposed a readout circuit of pulse waveform and rate for a U-health system to monitor health condition. For long-time operation without replacing or charging a battery, either pulse waveform or pulse rate is selected as the output data of the proposed readout circuit according to health condition of a user. The proposed readout circuit consists of a simple digital logic discriminator and a dual-mode ADC which operates in the ADC mode or in the count mode. Firstly, the readout circuit counts pulse rate for 4 seconds in the count mode using the dual-mode ADC. Health condition is examined after the counted pulse rate is accumulated for 1 minute in the discriminator. If the pulse rate is out of the preset normal range, the dual-mode ADC operates in the ADC mode where pulse waveform is converted into 10-bit digital data with the sampling frequency of 1 kHz. These data are stored in a buffer and transmitted by 620 kbps to an external monitor through a RF transmitter. The data transmission period of the RF transmitter depends on the operation mode. It is generally 1 minute in the normal situation or 1 ms in the emergency situation. The proposed readout circuit was designed with $0.11{\mu}m$ process technology. The chip area is $460{\times}800{\mu}m^2$. According to measurement, the power consumption is $161.8{\mu}W$ in the count mode and $507.3{\mu}W$ in the ADC mode with the operating voltage of 1 V.

• Journal of Navigation and Port Research
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• v.29 no.1 s.97
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• pp.91-96
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• 2005

The National Marine Electronics Association(NMEA) is nonprofit-making cooperation composed with manufacturers, distributors, wholesalers and educational institutions. We use the basic port of equipment in order to process the signal from NMEA signal using equipment. When we don't have enough one, we use the multi-port for processing. However, we need to have module development simulation which could multiplex and provide NMEA related signal that we could solve the problems in multi-port application and exclusive equipment generation for a number of signal. For now, we don't have any case or product using NMEA multiplexer so that we import expensive foreign equipment or embody NMEA signal transmission program like software, using multi-port. These have problems since we have to pay lots ci money and build separate processing part for every application programs. Besides, every equipment generating NMEA signal are from different manufactures and have different platform so that it could cause double waste and loss of recourse. For making up for it, I suggest the NMEA multiplexer embodiment, which could independently move by reliable process and high performance single hardware module, improve the memory efficiency of module by designing the optimized Queue, and keep having reliability for realtime communication among the equipment such as main input sensor equipment Gyrocompass, Echo-sound, and GPS.

• Journal of Navigation and Port Research
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• v.33 no.10
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• pp.691-697
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• 2009

Hardware dedicated off-the-shelf maritime differential GPS RSIM lacks the open architecture to meet all the minimum maritime user requirements and to include future GNSS improvements after recapitalization. This paper carries out a study to replace existing hardware dedicated differential GPS RSIM with software differential GPS RSIM in order to make up the weak point of hardware dedicated off-the-shelf maritime differential GPS RSIM. In this paper, the architecture of software RSIM is proposed for maritime DGPS recapitalization. And the feasibility analysis of the proposed software differential GPS RSIM is performed as the first phase to realize the proposed architecture. For the feasibility analysis, the prototype RF module and DSP module are implemented with properties as wide RF bandwidth, high sampling frequency, and high speed transmission interface. This paper shows that the proposed architecture has the possibility of real time operation of software RSIM functionality onto the PC-based platform through the analysis of computation time. Finally, this paper verifies that the L1/L2 dual frequency software differential RSIM designed according to the proposed method satisfies the performance specifications set out in RTCM paper 221-2006-SC104-STD.

• Journal of Broadcast Engineering
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• v.18 no.2
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• pp.204-214
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• 2013

Recently various research have been conducted relating to the implementation of signal processing or communication system by software using the massively parallel processing capability of the GPU. In this work, we focus on reducing software simulation time of 2K/8K FFT in DVB-T by using GPU. we estimate the processing time of the DVB-T system, which is one of the standards for DTV transmission, by CPU. Then we implement the FFT processing by the software using the NVIDIA's massively parallel GPU processor. In this paper we apply stream process method to reduce the overhead for data transfer between CPU and GPU, coalescing method to reduce the global memory access time and data structure design method to maximize the shared memory usage. The results show that our proposed method is approximately 20~30 times as fast as the CPU based FFT processor, and approximately 1.8 times as fast as the CUFFT library (version 2.1) which is provided by the NVIDIA when applied to the DVB-T 2K/8K mode FFT.