• Title/Summary/Keyword: Translator

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Detecting and Segmenting Text from Images for a Mobile Translator System

  • Chalidabhongse, Thanarat H.;Jeeraboon, Poonsak
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.875-878
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    • 2004
  • Researching in text detection and segmentation has been done for a long period in the OCR area. However, there is some other area that the text detection and segmentation from images can be very useful. In this report, we first propose the design of a mobile translator system which helps non-native speakers to understand the foreign language using ubiquitous mobile network and camera mobile phones. The main focus of the paper will be the algorithm in detecting and segmenting texts embedded in the natural scenes from taken images. The image, which is captured by a camera mobile phone, is transmitted to a translator server. It is initially passed through some preprocessing processes to smooth the image as well as suppress noises. A threshold is applied to binarize the image. Afterward, an edge detection algorithm and connected component analysis are performed on the filtered image to find edges and segment the components in the image. Finally, the pre-defined layout relation constraints are utilized in order to decide which components likely to be texts in the image. A preliminary experiment was done and the system yielded a recognition rate of 94.44% on a set of 36 various natural scene images that contain texts.

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Design and Implementation of the Internetworking Architecture between IPv4 and IPv6 in IMS based Mobile networks (IMS기반 이동패킷망에서의 IPv4/IPv6 연동구조 설계 및 구현)

  • You, Seugn-Kwan;Kim, Young-Han
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.11 s.353
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    • pp.168-174
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    • 2006
  • In this paper, we propose an architecture for communication between the IPv4-based UA and the IPv6-based UA in IMS based Mobile Networks, and design and implement the IMS protocol Translator for verification of the architecture. For the design of the internetworking between the IPv4 and the IPv6, we analyze the transition mechanisms and investigate the protocol translator. The IMS protocol translator is composed of the IMS-ALG(IP Multimedia Subsystem - Application Level Gateway) and TrGW(Translation Gateway), and the conformance of these components are verified by experiments.

Translation of Java Bytecode into C code with the JNI (자바 바이트코드로부터 JNI를 사용한 C 코드의 변환)

  • 권혜은;김상훈
    • The Journal of Information Technology
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    • v.4 no.1
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    • pp.1-7
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    • 2001
  • The well-known tradeoff of Java's portability is the inefficiency of its basic execution model, which relies on the interpretation of an virtual machine. Many solutions have been proposed to overcome this problem, such as just-in-time(JIT) and offline bytecode compilers. However, JIT compiler can not avoid the overhead of runtime. since it translate bytecode into native code at runtime. And, pure offline bytecode compiler limits the ability of dynamic class loading. In this paper, we present an approach which preserves the ability to dynamically load bytecode, and is more efficient than JIT. In contrast to existing bytecode-to-C translator using the old NMI, our translator maintain complete compatibility and portability through using the Java Native Interface(JNI) standard. We have designed and implemented an translator for converting bytecode to C code with JNI.. named MyJNItool.

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Translation Java Bytecode to EVM SIL Code for Embedded Virtual Machines

  • Lee, Yang-Sun;Park, Jin-Ki
    • Journal of Korea Multimedia Society
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    • v.8 no.12
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    • pp.1658-1668
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    • 2005
  • This paper presents the bytecode-to-SIL translator which enables the execution of the java program in EVM(Embedded Virtual Machine) environment without JVM(java Virtual Machine), translating bytecodes produced by compiling java programs into SIL(Standard Intermediate Language) codes. EVM, what we are now developing, is a virtual machine solution that can download and execute dynamic application programs written in sequential languages like C language as well as object oriented languages such as C#, Java, etc. EVM is a virtual machine mounted on embedded systems such as mobile device, set-top box, or digital TV, and converts the application program into SIL, an assembly language symbolic form, and execute it. SIL is a virtual machine code for embedded systems, based on the analysis of existing virtual machine codes such as bytecode, MSIL, etc. SIL has such features as to accommodate various programming languages, and in particularly has an operation code set to accept both object-oriented languages and sequential languages. After compiling, a program written in java language is converted to bytecode, and also executed by JVM platform but not in other platform such as .NET, EVM platform. For this reason, we designed and implemented the bytecode-to-SIL translator system for programs written in java language to be executed in the EVM platform without JVM. This work improves the execution speed of programs, enhances the productivity, and provides an environment for programmers to execute application programs at various platforms.

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Design and Implementation of Intermediate Code Translator for Native Code Generation from Bytecode (바이트코드로부터 네이티브 코드 생성을 위한 중간 코드 변환기의 설계 및 구현)

  • 고광만
    • Journal of Korea Multimedia Society
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    • v.5 no.3
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    • pp.342-350
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    • 2002
  • The execution speed is not an important factor for Java programming language when implementing small size application program which is executed on the web browser, but it becomes a serious limitation when the huge-size programs are implemented. To overcome this problem, the various research is conducted for translating the Bytecode into the target code which can be implemented in the specific processor by using classical compiling methods. In this research, we have designed and realized an intermediate code translator for the native code generation system with which we can directly generate i386 code from Bytecode to improve the execution speed of Java application programs. The intermediate code translator generates the register-based intermediate code from *.class files which are the intermediate code of Java.

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Integration of History-based Parametric CAD Model Translators Using Automation API (오토메이션 API를 사용한 설계 이력 기반 파라메트릭 CAD 모델 번역기의 통합)

  • Kim B.;Han S.
    • Korean Journal of Computational Design and Engineering
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    • v.11 no.3
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    • pp.164-171
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    • 2006
  • As collaborative design and configuration design are of increasing importance in product development, it becomes essential to exchange the feature and parametric CAD models among participants. A history-based parametric method has been proposed and implemented. But each translator which exchanges the feature and parametric information tends to be heavy because to implement duplicated functions such as the identification of the selected geometries, mapping between features which have different attributes. Furthermore. because the history-based parametric translator uses the procedural model as the neutral format, which is the XML macro file, the history-based parametric translators need a geometric modeling kernel to generate an internal explicit geometric model. To ease the problem, we implemented a shared integration platform, the TransCAD. The TransCAD separates translators from the XML macro files. The translators for various CAD systems need to communicate with only the TransCAD. To support the communication with the TransCAD, we exposed the functions of the TransCAD by using the Automation APIs, which is developed by Microsoft. The Automation APIs of the TransCAD consist of the part modeling functions, the data extraction functions, and the utility functions. Each translator uses these functions to translate a parametric CAD model from the sending CAD system into the XML format, or from the in format into the model of the receiving CAD system This paper introduces what the TransCAD is and how it works for the exchange of the feature and parametric models.

GCC2Verilog Compiler Toolset for Complete Translation of C Programming Language into Verilog HDL

  • Huong, Giang Nguyen Thi;Kim, Seon-Wook
    • ETRI Journal
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    • v.33 no.5
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    • pp.731-740
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    • 2011
  • Reconfigurable computing using a field-programmable gate-array (FPGA) device has become a promising solution in system design because of its power efficiency and design flexibility. To bring the benefit of FPGA to many application programmers, there has been intensive research about automatic translation from high-level programming languages (HLL) such as C and C++ into hardware. However, the large gap of syntaxes and semantics between hardware and software programming makes the translation challenging. In this paper, we introduce a new approach for the translation by using the widely used GCC compiler. By simply adding a hardware description language (HDL) backend to the existing state-of- the-art compiler, we could minimize an effort to implement the translator while supporting full features of HLL in the HLL-to-HDL translation and providing high performance. Our translator, called GCC2Verilog, was implemented as the GCC's cross compiler targeting at FPGAs instead of microprocessor architectures. Our experiment shows that we could achieve a speedup of up to 34 times and 17 times on average with 4-port memory over PICO microprocessor execution in selected EEMBC benchmarks.

A Light Weighted Robust Korean Morphological Analyzer for Korean-to-English Mobile Translator (한영 모바일 번역기를 위한 강건하고 경량화된 한국어 형태소 분석기)

  • Yuh, Sang-Hwa
    • Journal of the Korea Society of Computer and Information
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    • v.14 no.2
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    • pp.191-199
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    • 2009
  • In this paper we present a light weighted robust Korean morphological analyzer for mobile devices such as mobile phones, smart phones, and PDA phones. Such mobile devices are not suitable for natural language interfaces for their low CPU performance and memory restriction. In order to overcome the difficulties we propose 1) an online analysis by using Key Event Handler mechanism, 2) and a robust analysis of the Korean sentences with spacing errors without its correction pre-processing. We adapt the proposed Korean analyzer to a Korean-English mobile translator, which shows 5.8% memory usage reduction and 19.0% enhancement of average response time.

The Activity of an interpreter on science education during the enlightenment period in Korea: Focus on Hyun Chae (개화기 역관(譯官)의 과학교육 활동: 현채(玄采)를 중심으로)

  • Park, Jong-Seok
    • Journal of The Korean Association For Science Education
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    • v.29 no.6
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    • pp.741-750
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    • 2009
  • Modem science education was introduced to Korea in the enlightenment period. The science textbooks which were published at that time were important to modem science education in Korea. Therefore, the translators and publishers of science textbooks were the leader of the science education in the enlightenment period. Hyun Chae and his son as a translator were one of the leaders in science education at that time. Hyun Chae was born to a Middle class (中人)family and succeeded to pass the national examination for translators (譯科). He worked as a translator and author at the Ministry of Education (學部). Also, he was the associate teacher in a foreign school and the Hansung normal school (漢城師範學校). He published 26 books. One of them, Rikwa (理科) as the science textbook covering all the areas of science, physics, chemistry, biology and earth science. That presented the knowledge, which students should know by proper method, induced students' interest and included various experiments. Hyun Chae's activity in science education as the author and translator of science textbooks was an important role on the forming science education in the enlightenment period because it was caught short of science textbooks. The author, translator, and publisher of science textbooks was of great significance to make science popular, which was the new culture. Therefore, the role and activities in science education of Hyun Chae was a part of the history of science education, he knew a foreign language and was the leader in facilitating exchange with foreign countries.

English Critique and Verb Dictionary based on Extended Verb Pattern (확장 동사형에 기반한 동사사전과 영어 문장 검사기)

  • 차의영
    • Korean Journal of Cognitive Science
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    • v.3 no.2
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    • pp.311-328
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    • 1992
  • The level and accuracy of English sentence that is generated by a man or machine translator are determined by the content of the verb dictionary and effective generation algorithm.The conventional English critiques is not adequate for foreigners because they do not have the verb dictionary including verb pattern or the important grammatical constraints. In this paper,Ipropose a structure of verb dictionary and an English sentence critique based on extended verb pattern that is useful to check and correct mistakes of English sentences generated by machine translator.