• Proceedings of the Korean Society for Cognitive Science Conference
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• 2005.05a
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• pp.255-260
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• 2005

번역 메모리(Translation Memory)는 오늘날 기계번역에 있어 통계기반 접근법이나 형태-통사적 접근법 모두에 있어 가장 중요한 요소로 평가되고 있다. 그러나 번역 메모리는 언어의 자질 및 각 용례를 통합적으로 관리해야 하며, 이를 기계가 자동으로 처리해주어야 하는 어려움이 있다. 최근에는 이러한 문제점을 해결하기 위해 다국적 기업을 중심으로 기계보조번역(Computer Aided Translation) 환경에 대한 연구가 활발히 이루어지고 있으나, 언어적인 특성 보다는 번역 메모리의 저장/대치적 측면에서 주요 연구가 이루어지고 있다. 이 논문에서는 번역 메모리 정보가 보다 높은 재사용성을 보이기 위해서는 다양한 언어자질값을 담을 수 있어야 한다고 보고, 이를 효율적으로 관리/구축할 수 있는 기계보조번역 워크벤치의 framework을 제시한다. 언어분석을 위한 대상언어로는 교역 및 기술 측면에서 영어, 일어, 중국어 다음으로 영향력이 높은 불어를 채택하며, 기존 기계보조번역 방식에 대한 고찰을 통해 개선된 번역 메모리 관리, 자동분석/번역 모듈 및 협업(collaboration) 방안에 대해 소개하고, 향후 발전방향에 대해 논의한다.

• The Transactions of the Korea Information Processing Society
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• v.7 no.10
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• pp.3247-3261
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• 2000

In recent years, as the complexity of signal processmg systems Increases, the needs for dcslgners to mlx up hardware-part and software-part grow more and more considering both performance and cost There exist many algorilhms In C for vanous Signal processung apphcations. We have to translate the algonlhm C to hardware descnptlon language(HDL), If portion or the algonlhm needs to be unplcmenled in hardwarc pari of the syslcm. For this translation. it's dtfftcult to handle dynamic memory allocalion, function calls, pointer manipoJalion. This research shows a design method for a hardware model about recursive calls which was classified into software part of the system previously [or the translation from C to VHDL. The benefits of havlIlg recursive calls m hardware structure can be quite high since provides flexbility in hardware/software partitioming in codesign sysem.

• IEMEK Journal of Embedded Systems and Applications
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• v.15 no.6
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• pp.289-297
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• 2020

Although flash disks are being used widely instead of hard disks, it is difficult to optimize for effective utilization of flash disks because overwrite in place is impossible and the power consumption and time required for read, write, and erase operations are all different. One of these optimization issues is a cache management strategy to minimize write operations. The cache operates at two levels: an operating system equipped with flash disks and a translation layer within the flash disk. Most studies deal with the operating system-level cache strategy. In this study, we implement and analyse the DPW-LRU algorithm which is one of the recently proposed operating system cache replacement algorithms to apply to FTL, and grope with some improvements. As a result of the experiment, the DPW-LRU algorithm maintained superiority even in the FTL environment, and showed better performance with a slight improvement.

• The KIPS Transactions:PartD
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• v.14D no.7
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• pp.719-726
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• 2007

Recently, NAND flash memory has been used for a storage device in various mobile computing devices such as MP3 players, mobile phones and laptops because of its shock-resistant, low-power consumption, and none-volatile properties. However, due to the very distinct characteristics of flash memory, disk based systems and applications may result in severe performance degradation when directly adopting them on flash memory storage systems. Especially, when a B-tree is constructed, intensive overwrite operations may be caused by record inserting, deleting, and its reorganizing, This could result in severe performance degradation on NAND flash memory. In this paper, we propose an efficient buffer management scheme, called IBSF, which eliminates redundant index units in the index buffer and then delays the time that the index buffer is filled up. Consequently, IBSF significantly reduces the number of write operations to a flash memory when constructing a B-tree. We also show that IBSF yields a better performance on a flash memory by comparing it to the related technique called BFTL through various experiments.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.4
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• pp.177-185
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• 2005

NAND-type flash memory is becoming increasingly popular as a large data storage for mobile computing devices. Since flash memory is an order of magnitude more expensive than magnetic disks, data compression can be effectively used in managing flash memory based storage systems. However, compressed data management in NAND-type flash memory is challenging because it supports only page-based I/Os. For example, when the size of compressed data is smaller than the page size. internal fragmentation occurs and this degrades the effectiveness of compression seriously. In this paper, we present an efficient flash compression layer (FCL) for NAND-type flash memory which stores several small compressed pages into one physical page by using a write buffer Based on prototype implementation and simulation studies, we show that the proposed scheme offers the storage of flash memory more than $140\%$ of its original size and expands the write bandwidth significantly.

• Journal of the Korea Society of Computer and Information
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• v.22 no.2
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• pp.1-7
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• 2017

Recently, NAND flash memory, which is used as a storage medium, is replacing HDD (Hard Disk Drive) at a high speed due to various advantages such as fast access speed, low power, and easy portability. In order to apply NAND flash memory to a computer system, a Flash Translation Layer (FTL) is indispensably required. FTL provides a number of features such as address mapping, garbage collection, wear leveling, and hot data identification. In particular, hot data identification is an algorithm that identifies specific pages where data updates frequently occur. Hot data identification helps to improve overall performance by identifying and managing hot data separately. MHF (Multi hash framework) technique, known as hot data identification technique, records the number of write operations in memory. The recorded value is evaluated and judged as hot data. However, the method of counting the number of times in a write request is not enough to judge a page as a hot data page. In this paper, we propose hot data identification which considers not only the number of write requests but also the persistence of write requests.

• Journal of KIISE:Databases
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• v.35 no.5
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• pp.400-410
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• 2008

Flash memory has been widely used in mobile devices, such as mobile phone and digital camera. Recently flash SSD(Solid State Disk), having same interface of the disk drive, is replacing the hard disk of some laptop computers. However, flash memory still cannot be considered as the storage of database systems. The FTL(Flash Translation Layer) of commercial flash SSD, making flash memory operate exactly same as a hard disk, shows poor performance on the workload of databases with many random overwrites. Recently In-Page Logging(IPL) approach was proposed to solve this problem. In this paper, we implement IPL approach on SQLite, a popular open source embedded DBMS, and evaluate its performance. It improves the performance by up to 30 factors for update queries.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.3
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• pp.710-716
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• 2008

This paper covers the performance evaluation of two flash memory-based file storages, NAND and NOR, which are the major flash types. To evaluate their performances, we set up separate file storages for the two types of flash memories on a PocketPC-based experimental platform. Using the platform, we measured and compared the I/O throughputs in terms of buffer size, amount of used space, and kernel-level write caching. According to the results from our experiments, the overall performance of the NAND-based storage is higher than that of NOR by up to 4.8 and 5.7 times in write and read throughputs, respectively. The experimental results show the relative strengths and weaknesses of the two schemes and provide insights which we believe assist in the design of flash memory-based file storages.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.9
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• pp.685-689
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• 2009

Flash memory has several features such as low~power consumption and fast access so that there has been various research on using flash memory as new storage. Especially the Solid State Disk which is composed of flash memory chips has recently replaced the hard disk. At present, SSD adopts the multi-channel and multi-way architecture to exploit advantages of parallel access. In this architecture, data are written on SSD in a unit of a superblock which is composed of multiple blocks in which some blocks are put together. This paper proposes two schemes of selecting, segmenting and re-composing victim superblocks to optimize concurrent processing when a buffer flush occurs. The experimental results show that 35% of superblock- based write operations is reduced by selecting victims and additional 9% by composition of superblock.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.3
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• pp.78-87
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• 2013

NAND flash memory has been widely used as a storage medium in mobile devices, PCs, and workstations due to its advantages such as low power consumption, high performance, and random accessability compared to a hard disk drive. However, NAND flash cannot support in-place update so that it is mandatory to erase the entire block before overwriting the corresponding page. In order to overcome this drawback, flash storages need a software support, named Flash Translation Layer. However, as the high performance mass NAND flash memory is getting widely used, the size of mapping tables is increasing more than the limited DRAM size. In this paper, we propose an adaptive mapping information caching algorithm based on page mapping to solve this DRAM space shortage problem. Our algorithm uses a mapping information caching scheme which minimize the flash memory access frequency based on the analysis of several workloads. The experimental results show that the proposed algorithm can increase the performance by up to 70% comparing with the previous mapping information caching algorithm.