• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.8 no.4
• /
• pp.906-911
• /
• 2004

In this paper, a VCDRO(Voltage Control Dielectric Resonator Oscillator) applied to FMCW(Frequency Modulated Continuous Wave)Radar as stable source is implemented and constructed with a MESFET(Metal-semiconductor Field-Effect Transistor) for low noise, a dielectric resonate. of high frequency selectivity, and high Q varator diode to obtain a good phase noise performance and stable sweep characteristics. The designed circuits is simulated thrash harmonic balance simulation technique to provide the optimum performance. The measured result of a fabricated VCDRO shows that output is 2.22㏈m at 12.05GHz, harmonic suppression -30㏈c, phase noise -130㏈c at 100KHz offset, and sweep range of varator diode $\pm$18.7MHz, respectively. This oscillator will be available to FMCW Radar.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.06a
• /
• pp.257-257
• /
• 2007

고밀도 FeRAM (Ferroe!ectric Random Access Memory) 소자를 개발하기 위해서는 강유전체 물질을 이용한 안정적인 스텍형의 커패시터 개발이 필수적이다. 특히 $(Bi,La)_4Ti_3O_{12}$ (BLT) 강유전체 물질을 이용하는 경우에는 낮은 열처리 온도에서도 균질하고 높은 값의 잔류 분극 값을 확보하는 것이 가장 중요한 과제 중의 하나이다. 불행히도, BLT 물질은 a-축으로는 약 $50\;{\mu}C/cm^2$ 정도의 높은 잔류 분극 값을 갖지만, c-축 방향으로는 $4\;{\mu}C/cm^2$ 정도의 낮은 잔류 분극 값을 나타내는 동의 강한 비등방성 특성을 보인다. 따라서 BLT 박막에서 각각 입자들의 크기 및 결정 방향성을 세밀하게 제어하는 것은 무엇보다 중요하다. 본 연구에서는 16 Mb의 1T/1C (1-transistor/1-capacitor) 형의 FeRAM 소자를 BLT 박막을 적용하여 제작하였다. 솔-젤 (sol-gel) 용액을 이용하여 스핀코팅법으로 BLT 박막을 증착하고, 후속 열처리 공정을 RTP (rapid thermal process) 공정을 이용하여 수행하였다. 커패시터의 하부 전극 및 상부 전극은 각각 Pt/IrOx/lr 및 Pt을 적용하였다. 반응성 이온 에칭 (RIE: reactive ion etching) 공정을 이용하여 커패시터를 형성시킨 후, 32k-array (unit capacitor: $0.68\;{\mu}m$) 패턴에서 측정한 스위칭 분극 (dP=P*-P^) 값은 약 $16\;{\mu}C/cm^2$ 정도이고, 웨이퍼 내에서의 균일도도 2.8% 정도로 매우 우수한 특성을 보였다. 그러나 단위 셀들의 특성을 평가하기 위하여 bit-line의 전압을 측정한 결과, 약 10% 정도의 커패시터에서 불량이 발생하였다. 그리고 이러한 불량 젤들은 매우 불규칙적으로 분포함을 확인할 수 있었다. 이러한 불량 원인을 파악하기 위하여 양호한 젤과 불량이 발생한 셀에서의 BLT 박막의 미세구조를 분석하였다. 양호한 셀의 BLT 박막 입자들은 불량한 셀에 비하여 작고 비교적 균일한 크기를 갖고 있었다. 이에 비하여 불량한 셀에서의 BLT 박막에는 과대 성장한 입자들이 존재하고 이에 따라서 입자 크기가 매우 불균질한 것으로 확인되었다. 또 이러한 과대 성장한 입자들은 거의 모두 c-축 배향성을 나타내었다. 이상의 실험 결과들로부터, BLT 박막을 이용하여 제작한 FeRAM 소자에서 발생하는 불규칙한 셀 불량의 주된 원인은 c-축 배향성을 갖는 과대 성장한 입자의 생성임을 알 수 있었다. 즉 BLT 박막을 이용하여 FeRAM 소자를 제작하는 경우, 균일한 크기의 입자 및 c-축 배향성의 입자 억제가 매우 중요한 기술적 요소임을 알 수 있었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.06a
• /
• pp.329-329
• /
• 2007

Photoconductive poly crystalline lead oxide coated on amorphous thin film transistor (TFT) arrays is the best candidate for direct digital x-ray detector for medical imaging. Thicker films with lessening density often show lower x-ray induced charge generation and collection becomes less efficient. In this work, we present a new methodology used for the high density deposition of PbO. We investigate the structural properties of the films using X-ray diffraction and electron microscopy experiments. The film coatings of approximately $200\;{\mu}m$ thickness were deposited on $2"{\times}2"$ conductive-coated glass substrates for measurements of dark current and x-ray sensitivity. The lead oxide (PbO) films of $200\;{\mu}m$ thickness were deposited on glass substrates using a wet coating process in room temperature. The influence of post-deposition annealing on the characteristics of the lead oxide films was investigated in detail. X-ray diffraction and scanning electron microscopy, and atomic force microscopy have been employed to obtain information on the morphology and crystallization of the films. Also we measured dark current, x-ray sensitivity and linearity for investigation of the electrical characteristics of films. It was found that the annealing conditions strongly affect the electrical properties of the films. The x-ray induced output charges of films annealed in oxygen gas increases dramatically with increasing annealing temperatures up to $500^{\circ}C$ but then drops for higher temperature anneals. Consequently, the more we increase the annealing temperatures, the better density and film quality of the lead oxide. Analysis of this data suggests that incorporation and decomposition reactions of oxygen can be controlled to change the detection properties of the lead oxide film significantly. Post-deposition thermal annealing is also used for densely film. The PbO films that are grown by new methodology exhibit good morphology of high density structure and provide less than $10\;pA/mm^2$ dark currents as they show saturation in gain (at approximate fields of $4\;V/{\mu}m$). The ability to operate at low voltage gives adequate dark currents for most applications and allows voltage electronics designs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.11a
• /
• pp.429-429
• /
• 2007

For various applications of liquid crystal displays (LCDs), the uniform alignment of liquid crystal (LC) molecules on treated surfaces is significantly important. Generally, a rubbing method has been widely used to align the LC molecules on polyimide (PI) surfaces. Rubbed PI surfaces have suitable characteristics, such as uniform alignment. However, the rubbing method has some drawbacks, such as the generation of electrostatic charges and the creation of contaminating particles. Thus, we strongly recommend a non contact alignment technique for future generations of large high-resolution LCDs. Most recently, the LC aligning capabilities achieved by ultraviolet and ion-beam exposures which are non contact methods, on diamond-like carbon (DLC) inorganic thin film layers have been successfully studied because DLC thin films have a high mechanical hardness, a high electrical resistivity, optical transparency, and chemical inertness. In addition, nitrogen-doped DLC (NDLC) thin films exhibit properties similar to those of the DLC thin films and a higher thermal stability than the DLC thin films because C:N bonding in the NDLC thin filmsis stronger against thermal stress than C:H bonding in the DLC thin films. Our research group has already studied the NDLC thin films by an ion-beam alignment method. The $SiN_x$ thin films deposited by plasma-enhanced chemical vapor deposition are widely used as an insulation layer for a thin film transistor, which has characteristics similar to those of DLC inorganic thin films. Therefore, in this paper, we report on LC alignment effects and pretilt angle generation on a $SiN_x$, thin film treated by ion-beam irradiation for various N ratios

• Proceedings of the Korean Vacuum Society Conference
• /
• 2000.02a
• /
• pp.186-186
• /
• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• Journal of the Korean Vacuum Society
• /
• v.12 no.4
• /
• pp.218-227
• /
• 2003

Pd/Si/Ti/Pt and Pd/Si/Pd/Ti/Au ohmic contacts to n-type InCaAs were investigated for applications to AlGaAs/GaAs HBT emitter ohmic contacts. In the Pd/Si/Ti/Pt ohmic contact, as-deposited contact showed non-ohmic behavior, and high specific contact resistivity of $5\times10^{-3}\Omega\textrm{cm}^2$ was achieved by rapid thermal annealing at $375^{\circ}C$/10 sec. However, the specific contact resistivity decreased remarkably to $2\times10^{-6}\Omega\textrm{cm}^2$ by annealing at $425^{\circ}C$/10sec. In the Pd/Si/Pd/Ti/Au ohmic contact, minimum specific contact resistivity of $3.9\times10^{-7}\Omega\textrm{cm}^2$ was achieved by annealing at $400^{\circ}C$/20sec. In both ohmic contacts, low contact resistivity and non-spiking planar interface between ohmic materials and InGaAs were maintained. Therefore, these thermally stable ohmic contact systems are promising candidates for compound semiconductor devices. RF performance of the AlGaAs/GaAs HBT was also examined by employing the Pd/Si/Ti/Pt and Pd/Si/Pd/Ti/Au systems as emitter ohmic contacts. Cutoff frequencies were 63.9 ㎓ and 74.4 ㎓, respectively, and maximum oscillation frequencies were 50.1 ㎓ and 52.5 ㎓, respectively. It shows very successful high frequency operations.

• Journal of the Korean Vacuum Society
• /
• v.15 no.6
• /
• pp.630-636
• /
• 2006

Scale down of semiconductor gate pattern will make progress centrally line width into transistor according to the high integration and high density of flash memory semiconductor. Recently, the many researchers are in the process of developing research for using the ONO(oxide-nitride-oxide) technology for the gate pattern give body to line breadth of less 100 nm. Therefore, etch rate and etch profile of the line width detail of less 100 nm affect important factor in a semiconductor process. In case of increasing of the platen power up to 50 W at the ICP etcher, etch rate and PR selectivity showed good result when the platen power of ICP etcher has 100 W. Also, in case of changing of HBr gas flux at the platen power of 100 W, etch rate was decreasing and PR selectivity is increasing. We founded terms that have etch rate 320 nm/min, PR selectivity 3.5:1 and etch slope have vertical in the case of giving the platen power 100 W and HBr gas 35 sccm at the ICP etcher. Also notch was not formed.

• Journal of the Korean Vacuum Society
• /
• v.14 no.4
• /
• pp.207-214
• /
• 2005

This paper presents a channel structure for promising high performance pseudomorphic high electron mobility transistor(pHEMT) switching device for design and fabricating of microwave control circuits, such as switches, phase shifters, attenuators, limiters, for application in personal mobile communication systems. Using the designed epitaxial channel layer structure and ETRI's $0.5\mu$m pHEMT switch process, single pole double throw (SPDT) Tx/Rx monolithic microwave integrated circuit (MMIC) switch was fabricated for 2.4 GHz and 5 GHz band wireless local area network (WLAN) systems. The SPDT switch exhibits a low insertion loss of 0.849 dB, high isolation of 32.638 dB, return loss of 11.006 dB, power transfer capability of 25dBm, and 3rd order intercept point of 42dBm at frequency of 5.8GHz and control voltage of 0/-3V These performances are enough for an application to 5 GHz band WLAN systems.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.08a
• /
• pp.289-289
• /
• 2013

While there are plenty of studies on synthesizing semiconducting germanium nanowires (Ge NWs) by vapor-liquid-solid (VLS) process, it is difficult to inject dopants into them with uniform dopants distribution due to vapor-solid (VS) deposition. In particular, as precursors and dopants such as germane ($GeH_4$), phosphine ($PH_3$) or diborane ($B_2H_6$) incorporate through sidewall of nanowire, it is hard to obtain the structural and electrical uniformity of Ge NWs. Moreover, the drastic tapered structure of Ge NWs is observed when it is synthesized at high temperature over $400^{\circ}C$ because of excessive VS deposition. In 2006, Emanuel Tutuc et al. demonstrated Ge NW pn junction using p-type shell as depleted layer. However, it could not be prevented from undesirable VS deposition and it still kept the tapered structures of Ge NWs as a result. Herein, we adopt $C_2H_2$ gas in order to passivate Ge NWs with carbon sheath, which makes the entire Ge NWs uniform at even higher temperature over $450^{\circ}C$. We can also synthesize non-tapered and uniformly doped Ge NWs, restricting incorporation of excess germanium on the surface. The Ge NWs with carbon sheath are grown via VLS process on a $Si/SiO_2$ substrate coated 2 nm Au film. Thin Au film is thermally evaporated on a $Si/SiO_2$ substrate. The NW is grown flowing $GeH_4$, HCl, $C_2H_2$ and PH3 for n-type, $B_2H_6$ for p-type at a total pressure of 15 Torr and temperatures of $480{\sim}500^{\circ}C$. Scanning electron microscopy (SEM) reveals clear surface of the Ge NWs synthesized at $500^{\circ}C$. Raman spectroscopy peaked at about ~300 $cm^{-1}$ indicates it is comprised of single crystalline germanium in the core of Ge NWs and it is proved to be covered by thin amorphous carbon by two peaks of 1330 $cm^{-1}$ (D-band) and 1590 $cm^{-1}$ (G-band). Furthermore, the electrical performances of Ge NWs doped with boron and phosphorus are measured by field effect transistor (FET) and they shows typical curves of p-type and n-type FET. It is expected to have general potentials for development of logic devices and solar cells using p-type and n-type Ge NWs with carbon sheath.

• Journal of the Korean Society of Radiology
• /
• v.13 no.6
• /
• pp.831-840
• /
• 2019

The X-ray detector by liquid crystal with front light was proposed and verified by a X-ray image. The proposed detector utilizes the visible light instead of the electric signal by transistor. Therefore, it shows low noise and can be fabricated at low cost. The liquid crystal detector uses the orientation change of the liquid crystal molecule by conductivity change of the photoconductive layer. We can get the X-ray image from the transmitted light through the liquid crystal. The X-ray dose was calibrated from the measured transmittance of the visible light after comparison to the reference transmittance curve of the liquid crystal. The amorphous Se was used for photo con ducting layer and parylene was used for the liquid crystal alignment instead of the conventional alignment layer which needs high-temperature process over 200℃. The proposed X-ray detector can decrease the X-ray dose by high sensitivity which was verified by simulation. After the fabrication of the X-ray detector, the X-ray image was obtained as a function of the bias voltage to the liquid crystal. 10 lines/mm resolution was obtained from the line pattern and we will apply it to the 17inch diagonal liquid crystal X-ray detector with 3π retardation.