• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1263-1265
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• 2007

The electrical characteristics of low temperature poly-Si (LTPS) thin-film transistors (TFT) with channel parallel and perpendicular to the direction of lateral growth were studied. The poly-Si film was crystallized using sequential lateral solidification (SLS) laser crystallization technique. The channel orientation dependent turn-on characteristics were investigated by using gated-diodes and capacitance-voltage measurements

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1512-1515
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• 1987

The buffer circuit having minimum delay time is designed and analyzed in this paper. Considering the parasitic components of the MOS transistor, the optimal transistor size ratio between the individual buffer stages is presented. This paper's result is better than that of the Mead and Conway's analysis [1] with respect to both delay time and total area that buffer occupies.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.12
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• pp.1865-1869
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• 1990

N-Channel polysilicon MOSFETs (W/L=20/1.5, 3, 5.10\ulcorner) were fabricated using RTP (Rapid Thermal Processor) and hydrogen passivation. The N+ source, drain and gate were annealed and recrystallized using RTP at temperature of 1000\ulcorner-1100\ulcorner. But the active areas were not specially crystallized before growing the gate oxide. Without the hydrogen passivarion, excellent transistor characteristics (ON/OFF=5.10**6, S=85MV/DEC, IL=51pA/\ulcorner) were obtained for 1.5\ulcorner MOSFET. Also the transistor characteristics were improved by hydrogen passivation.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.11
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• pp.910-914
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• 1991

This paper describes the improvement of frequency characteristic of crystal oscillator I.C using Ti-Salicide. The characteristics of transistor(drive current) using Ti-Salicide process are better than Poly-Si process, because the mobility. To know frequency characteristic of oscillator I.C, the simulation is performed using inverter buffer chain of Fan-out 10 TTL. Its result shows at once the generation of normal clock pulse in input signal and the improvement of rising and falling time.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.10
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• pp.25-34
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• 1995

A new vertical power MOSFET with over-current protection capability is proposed. The MOSFET consists of main power MOSFET cell, sensing MOSFET cell and lateral npn bipolar transistor. The proposed MOSFET may be fabricated by a conventional DMOS process without any additional fabrication step. Overcurrent state is sensed by the newly designed lateral bipolar transistor. Mixed-mode simulations proved that the overcurrent protection is achieved by the proposed MOSFET successfully with a small protection area less than 0.2 % of the total die area.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1103-1107
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• 2005

Single-crystal silicon thin films on glass (SOG) and on fused-quartz (SOQ) were prepared using wafer bonding and hydrogen-induced layer transfer. Thinfilm transistors (TFTs) were subsequently fabricated. The high-temperature processed SOQ TFTs show better device performance than the low-temperature processed SOG TFTs. Tensile and compressive strain was measured respectively on SOQ and SOG. Consistent with the tensile strain, enhanced electron effective mobility was measured on the SOQ TFTs.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1469-1471
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• 2001

A Dual Channel Trench IGBT (Insulated Gate Bipolar Transistor) is proposed to improve the latch-up characteristics. Simulation results by MEDICI have shown that the latching current density of proposed device was found to be 2850 A/$cm^2$ while that of conventional device was 1610 A/$cm^2$. The latching current desity of the proposed strucutre was 77.02% higher than that of conventional structre.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.49-52
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• 2002

A new method is developed to extract model parameters of SiGe HBT equivalent circuit including the base impedance and base-collector junction capacitance. Using this method, all resistances and capacitances of SiGe HBT are independently determined from measured S-parameters using two-port parameter formula. This method is proposed to reduce possible errors generated from global optimization process, and its accuracy has been verified by finding good agreements between measured and modeled current / power gain up to 18 GHz.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.253-256
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• 2002

In Currently, OTFTS are actively studied around the world because they are expected to create new novel applications, which can not be implemented by the conventional Si semiconductor, due to the unique characteristics of organic materials. In this paper, the hole field effect mobility has been improved to the level of a-Si TFTs with 0.3cm2/V.sec, simply applying the surface treatment process on the gate with organic molecules. In addition, the model has been suggested and the temperature dependence of hole mobility analyzed.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.63-66
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• 2000

In this paper, we propose two new CMOS composite transistors with an improved operating region by reducing a threshold voltage. The proposed composite transistor 1 and 2 employ a P-type folded composite transistor and an electronic zener diode in order to decrease the threshold voltage, respectively. The simulation has been carried oui using 0.25$\mu\textrm{m}$ n-well process with 2.5V supply voltage.