• Journal of Sensor Science and Technology
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• v.3 no.3
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• pp.16-21
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• 1994

A 3-terminal pin-type photosensor with gate contrail is fabricated using standard silicon CMOS IC process. The photosensor of a $100{\mu}m{\times}120{\mu}m$ size has dark current less than 1nA and its breakdown voltage is -14V with a depletion capacitance 0.75 pF at -5V reverse bias. Responsivity at 0V gate voltage is 0.25A/W at $0.633{\mu}m$ wavelength, 0.19A/W at $0.805{\mu}m$. Responsivity increases with increasing gate voltage. The integrated circuit of photosensor and CMOS inverter shows $22K{\Omega}$ transimpedance and photocurrent of $90{\mu}A$ switchs the output state of digital inverter without additional amplifier.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.12
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• pp.77-84
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• 2007

In this parer, a wideband low-noise amplifier (LNA) has been realized in a 0.18mm CMOS technology for the applications of subsampling direct-conversion RF receivers. By exploiting the inverter-type transimpedance input stage with a 3rd-order Chebyshev matching network, the wideband LNA demonstrates the measured results of the -3dB bandwidth of 5.35GHz, the power gain (S21) of $12\sim18dB$, the noise figure (NF) of $6.9\sim10.8dB$, and the broadband input/output impedance matching of less than -10dB/-24dB within the bandwidth, respectively. The chip dissipates 32.4mW from a single 1.8V supply, and occupies the area of $0.56\times1.0mm^2$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.8
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• pp.13-22
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• 2010

Independent-Gate-Mode Double-Gate(IGM-DG) MOSFET overcomes the limitation of bulk-MOSFET's channel controllability and enables to control the front and back-gate voltages independently. Therefore, circuit designs utilizing the IGM-DG MOSFETs provide the advantage of setting 4-terminal freely, hence achieving not only the performance improvement but also the larger scale integration. This paper presents a 15Gb/s optical receiver with a 1.0V power supply voltage, which consists of a transimpedance amplifier (TIA), a feedforward limiting amplifier (LA), and an output buffer. HSPICE simulations were conducted to confirm the circuit performance, and also to verify the circuit stability issues which may occur from the variations of process and supply voltage.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.12
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• pp.2311-2317
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• 2011

In this paper, we study the temperature change of a ${\mu}$-bolometer focal plane array with a capacitive transimpedance amplifier bias cancellation circuit. Thermal analysis is essential to understand the performance of a ${\mu}$-bolometer focal plane array, and to improve the temperature stability of a focal plane array characteristics. In this study, the thermal analyses of a ${\mu}$-bolometer and its two reference detectors are carried out as a function of time. The analyses are done with the $30{\mu}m$ pitch $320{\times}240$ focal plane array operating of 60 Hz frame rate and having a columnwise readout. From the results, the temperature increase of a ${\mu}$-bolometer in FPA by an incident IR is estimated as $0.689^{\circ}C$, while the temperature increase by a pulsed bias as $7.1^{\circ}C$, which is about 10 times larger than by IR. The temperature increase of a reference detector by a train of bias pulses may be increased much higher than that of an active ${\mu}$-bolometer. The suppression of temperature increase in a reference bolometer can be done by increasing the thermal conductivity of the reference bolometer, in which the selection of thermal conductivity also determines the range of CTIA output voltage.

• Journal of Electrical Engineering and Technology
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• v.13 no.2
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• pp.875-880
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• 2018

This paper proposes a novel combined compensation structure in the infrared receiver chip. For the infrared communication chip, the current-voltage (I-V) convert circuit is crucial and important. The circuit is composed by the transimpedance amplifier (TIA) and the combined compensation structures. The TIA converts the incited photons into photocurrent. In order to amplify the photocurrent and avoid the saturation, the TIA uses the combined compensation circuit. This novel compensation structure has the low frequency compensation and high frequency compensation circuit. The low frequency compensation circuit rejects the low frequency photocurrent in the ambient light preventing the saturation. The high frequency compensation circuit raises the high frequency input impedance preserving the sensitivity to the signal of interest. This circuit was implemented in a $0.6{\mu}m$ BiCMOS process. Simulation of the proposed circuit is carried out in the Cadence software, with the 3V power supply, it achieves a low frequency photocurrent rejection and the gain keeps 109dB ranging from 10nA to $300{\mu}A$. The test result fits the simulation and all the results exploit the validity of the circuit.

• ETRI Journal
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• v.35 no.2
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• pp.245-252
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• 2013

In this work, we study the physical layer solutions for 10-gigabit-capable passive optical networks (PONs), particularly for an optical link terminal (OLT) including a 10-Gbit/s electroabsorption modulated laser (EML) and a 2.5-Gbit/s burst mode receiver (BM-Rx) in a novel bidirectional optical subassembly (BOSA). As unique features, a bidirectional mini-flat package and a 9-pin TO package are developed for a 10-gigabit-capable PON OLT BOSA composed of a 1,577-nm EML and a 1,270-nm avalanche photodiode BM-Rx, including a single-chip burst mode integrated circuit that is integrated with a transimpedance and limiting amplifier. In the developed prototype, the 10-Gbit/s transmitter and 2.5-Gbit/s receiver characteristics are evaluated and compared with the physical media dependent (PMD) specifications in ITU-T G.987.2 for XG-PON1. By conducting the 10-Gbit/s downstream and 2.5-Gbit/s upstream transmission experiments, we verify that the developed 10-gigabitcapable PON PMD prototype can operate for extended network coverage of up to a 40-km fiber reach.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.66-71
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• 2014

This paper presents an analog front-end integrated circuit (IC) for medical ultrasound imaging systems using standard $0.18-{\mu}m$ CMOS process. The proposed front-end circuit includes the transmit part which consists of 15-V high-voltage pulser operating at 2.6 MHz, and the receive part which consists of switch and a low-power low-noise preamplifier. Depending on the operation mode, the output driver in the transmit pulser can be reconfigured as the switch in the receive path and thus the area of the overall front-end IC is reduced by over 70% in comparison to previous work. The designed single-channel front-end prototype consumes less than $0.045mm^2$ of core area and can be utilized as a key building block in highly-integrated multi-array ultrasound medical imaging systems.

• Korean Journal of Optics and Photonics
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• v.19 no.5
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• pp.343-348
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• 2008

This study was carried out to commercialize FTTH by developing a burst mode optical receiver for E-PON. The optical receiver was manufactured by minimizing the capacitance of a photodiode to improve sensitivity for meeting 10, 20 km OLT Rx standard of E-PON at the transmission speed of 1.25 Gb/s. When bit-error ratio is $10^{-12}$ and PRBS is $2^5-1$, sensitivity is -26 dBm, loud/soft ratio is 23 dB. Both preamble time and guard time were set to 102.4 ns (128 bit). After comparing a photodiode whose capacitance is 0.53 pF with another photodiode whose capacitance has been minimized to 0.26 pF, we could see that sensitivity improved to 0.7 dBm and so did bandwidth to 190 MHz of burst mode for the optical receiver manufactured by the photodiode whose capacitance is 0.26 pF.