• Journal of IKEEE
• /
• v.8 no.1 s.14
• /
• pp.12-21
• /
• 2004

Error control is one of major concerns in many electronic systems. Experience shows that most malfunctions during system operation are caused by transient faults, which often mean abnormal signal delays that may result in violations of circuit element timing constraints. This paper presents a novel CMOS-based concurrent timing error detector that makes a flip-flop to sense and then signal whether its data has been potentially corrupted or not by a setup or hold timing violation. Designed circuit performs a quiescent supply current evaluation to determine timing violation from the input changes in relation to a clock edge. If the input is too close to the clock time, the resulting switching transient current in the detection circuit exceeds a reference threshold at the instant of the clock transition and an error is flagged. The circuit is designed with a $0.25{\mu}m$ standard CMOS technology at a 2.5 V supply voltage. The validity and effectiveness are verified through the HSPICE simulation. The simulation results in this paper shows that designed circuit can be used to detect setup and hold time violations effectively in clocked circuit element.

• KSCE Journal of Civil and Environmental Engineering Research
• /
• v.4 no.2
• /
• pp.13-24
• /
• 1984

The main part of this thesis deals with a three-dimensional transient seepage flow, discussing its fundamental conception into Which the mathematical analysis was introduced based upon the finite element method, propriety of geometrical analysis and flow movement of seepage water. As is commented in the body of the report, the saturated-unsaturated method with respect to the free water surface method is revealed to have the relative merits and demerits. Generally, the unknown sections in the form of free water surface matters in case that tunnels or pores appear. On the other hand, the applicable range is quite large and variable to the methods accordingly. Also, an example as to the seepage analysis in the rock bed section is described. An unfavorable time-consuming problem is inevitale because the complicated and widely multifarious joints and faults are responsible for the intensity of seepage flow.

• Journal of Electrical Engineering and Technology
• /
• v.1 no.3
• /
• pp.279-286
• /
• 2006

A method for estimating the instantaneous phasor of a fault current signal is proposed for high-speed distance protection that is immune to a DC-offset. The method uses a modified notch filter in order to eliminate the power frequency component from the fault current signal. Since the output of the modified notch filter is the delayed DC-offset, delay compensation results in the same waveform as the original DC-offset. Subtracting the obtained DC-offset from the fault current signal yields a sinusoidal waveform, which becomes the real part of the instantaneous phasor. The imaginary part of the instantaneous phasor is based on the first difference of the fault current signal. Since a DC-offset also appears in the first difference, the DC-offset is removed trom the first difference using the results of the delay compensation. The performance of the proposed method was evaluated for a-phase to ground faults on a 345kV 100km overhead transmission line. The Electromagnetic Transient Program was utilized to generate fault current signals for different fault locations and fault inception angles. The performance evaluation showed that the proposed method can estimate the instantaneous phasor of a fault current signal with high speed and high accuracy.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.29 no.1
• /
• pp.103-112
• /
• 2015

Recently, DC distribution system has come into the spotlight as the number of digital loads and the use of renewable energy increases. However, there are still challenges for the commercialization of DC distribution system such as a consideration for the safety. Thus, researches on protective coordination and grounding system for the safety of human bodies and facilities in Low-Voltage DC (LVDC) distribution system should be preferentially conducted. In this paper, therefore, we analyze characteristics of faults in LVDC system accroding to type of grounding system based on IEC 60364. Finally, the simulations for fault characteristic in different grounding scheme are conducted using ElectroMagnetic Transient Program(EMTP) and the results of simulation are shown.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.66 no.4
• /
• pp.151-157
• /
• 2017

In this paper, it is the result of analysis of the stability by power system analysis about the influence on the power system when the southwest - offshore wind power demonstration complex is constructed to 60MW and it is linked with the onshore power system. Considering the position of the wind turbine actually installed and the length of the cooperating line, we modeled the wind generators, offshore substation and the turbine step-up transformer. Changes of voltage when internal and external faults occurred is analyzed and the reactive power demand according to the amount of electricity generation is derived. And also phase angle stability and frequency is observed through a transient analysis. This paper clarify that there is no problem in the system when only offshore wind power is linked with the grid and try to present the reactive power amount necessary for maintaining the voltage of the point of cooperation appropriately.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.59 no.8
• /
• pp.1360-1365
• /
• 2010

In this paper, we propose a distance relaying algorithm using a Discrete Fourier Transform (DFT)-based modified phasor estimation method to eliminate the adverse influence of exponentially decaying DC offsets. Most distance relays are based on estimating phasors of the voltage and current signals. A DFT is generally used to calculate the phasor of the fundamental frequency component in digital protective relays. However, the output of the DFT contains an error due to exponentially decaying DC offsets. For this reason, distance relays have a tendency to over-reach or under-reach in the presence of DC offset components in a fault current. Therefore, the decaying DC components should be taken into consideration when calculating the phasor of the fundamental frequency component of a relaying signal. The error due to DC offsets in a DFT is calculated and eliminated using the outputs of an even-sample-set DFT and an odd-sample-set DFT, so that the phasor of the fundamental component can be accurately estimated. The performance of the proposed algorithm is evaluated for a-phase to ground faults on a 345 kV, 50 km, simple overhead transmission line. The Electromagnetic Transient Program (EMTP) is used to generate fault signals. The evaluation results indicate that adopting the proposed algorithm in distance relays can effectively suppress the adverse influence of DC offsets.

• The Transactions of the Korea Information Processing Society
• /
• v.6 no.1
• /
• pp.216-224
• /
• 1999

In the paper we propose two recovery methods by adopting a rollback and/or roll-forward technique (S) to recover TMR failures in a TMR (structured ) system that is the simplest spatial redundancy. This technique is apparently effective to recovering TMR failures primarily caused by transient faults. The proposed policies carry out few reconfigurations at the cost of (minimal) time-overhead needed for those time-redundant schemes. The optimal checkpoint-interval vectors are derived for both methods through the likelihoods of all (possible) states of the system as well as the total execution-time. Consequently the effectiveness of our proposed policies is validated through certain numerical examples and simulations.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.2
• /
• pp.168-176
• /
• 2015

Due to the reduction in device feature size, transient faults (soft errors) in logic circuits induced by radiations increase dramatically. Many researches have been done in modeling and analyzing the susceptibility of sequential circuit elements caused by soft errors. However, to the best knowledge of the authors, there is no work which has well considerated the feedback characteristics and the multiple clock cycles of sequential circuits. In this paper, we present a new method for evaluating the susceptibility of sequential circuit elements to soft errors. The proposed method uses four Error Propagation Probability Matrixs (EPPMs) to represent the error propagation probability of logic gates and flip-flops in current clock cycle. Based on the predefined matrix union operations, the susceptibility of circuit elements in multiple clock cycles can be evaluated. Experimental results on ISCAS'89 benchmark circuits show that our method is more accurate and efficient than previous methods.

• The KIPS Transactions:PartA
• /
• v.13A no.5 s.102
• /
• pp.421-428
• /
• 2006

This paper proposes an integrated recovery approach applying retry and rollback techniques to recover the TMR failure. Combining the time redundancy techniques with W system is apparently effective to recover the TMR failure(or masked error) primarily caused by transient faults. These policies need fewer reconfigurations at the cost of extra time required for the time redundant schemes. The optimal numbers of retry and rollback to minimize the mean execution time of tasks are derived for the proposed method through computing the likelihoods of all possible states of the failed system. The effectiveness of the proposed method is validated through examining certain numerical examples and simulations conducted with a variety of parameters governing environmental characteristics.

• Proceedings of the KIEE Conference
• /
• 1990.07a
• /
• pp.106-112
• /
• 1990

This paper presents the FIR filtering scheme for digital distance protection. In most faults, there exists severe oscillation of apparent impedance according to distortion in transient waveforms. In these cases, this scheme provides more accurate fault detection and fault location, as compared with conventional schemes for digital distance protection or Kalman filtering schemes. The test of these facts were performed on EMTP result data. For the real time implementation of the proposed schemes, the motorola DSP 56001 was used to the main calculation board of the digital protective relaying system.