• Title/Summary/Keyword: Transfer switch

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Technique of Coronary Transfer for TGA with Single Coronary Artery

  • Kim, Tae Ho;Jung, Jae Jun;Kim, Yong Han;Yang, Ji-Hyuk;Jun, Tae-Gook
    • Journal of Chest Surgery
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    • v.47 no.6
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    • pp.529-532
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    • 2014
  • An eight-day-old neonate was diagnosed with dextro-transposition of the great arteries, atrial septal defect, patent ductus arteriosus, and a single sinus origin of the coronary arteries. The single coronary artery originated from the left sinus (sinus 2), had a proximal left circumflex arterial branch, and passed anteriorly to the right side of the aorta, further branching into the right coronary and left anterior descending arteries. We successfully performed an arterial switch operation and coronary transfer by tube graft reconstruction with autologous aortic tissue to treat the dextro-transposition of the great arteries and atrial septal defect with a single-sinus origin of the coronary arteries.

Performance Analysis of ATM Switch Using Priority Control by Cell Transfer Ratio (셀 전송비율에 의한 우선순위 제어방식을 사용한 ATM 스위치의 성능 분석)

  • 박원기;김영선;최형진
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.12
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    • pp.9-24
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    • 1995
  • In this paper, we proposed and analysed two kinds of priority control mechanism to archive the cell loss rate requirement and the delay requirement of each class. The service classes of our concern are the high time priority class(class 1) and the high loss priority class(class 2). Two kinds of priority control mechanism is divided by the method of storing the arriving class 2 cell in buffer on case of buffer full. The first one is the method which discarding the arriving class 2 cell, the second one is the mothod which storing the arriving class 2 cell on behalf of pushing out the class 1 cell in buffer. In the proposed priority schemes, one cell of the class 1 is transmitted whenever the maximum K cells of the class 2 is transmitted on case of transmitting the class 1 cell and the class 2 cell sequentially. In this paper, we analysed the cell loss rate and the mean cell delay for each class of the proposed priority scheme by using the Markov chain. The analytical results show that the characteristic of the mean cell delay becomes better for the class 1 cell and that of the cell loss rate becomes better for the class 2 cell by selecting properly the cell transfer ratio according to the condition of input traffic.

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Study on High Speed Routers(I)-Labeling Algorithms for STC104 (고속라우터에 대한 고찰(I)-STC104의 레이블링 알고리즘)

  • Lee, Hyo-Jong
    • The KIPS Transactions:PartA
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    • v.8A no.2
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    • pp.147-156
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    • 2001
  • A high performance routing switch is an essential device to either the high performance parallel processing or communication networks that handle multimedia transfer systems such as VOD. The high performance routing chip called STC104 is a typical example in the technical aspect which has 32 bidirectional links of 100Mbps transfer sped. It has exploited new technologies, such as wormhole routing, interval labeling, and adaptive routing method. The high speed router has been applied into some parallel processing system as a single chip. However, its performance over the various interconnection networks with multiple routing chips has not been studied. In this paper, the strucrtures and characteristics of the STC104 have been investigated in order to evaluate the high speed router. Various topology of the STC104, such as meshes, torus, and N-cube are defined and constructed. Algorithms of packet transmission have been proposed based on the interval labeling and the group adaptive routing method implemented in the interconnected network. Multicast algorithms, which are often requited to the processor networks and broadcasting systems, modified from U-mesh and U-torus algorithms have also been proposed overcoming the problems of point-to-point communication.

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Analysis and Design of Interleaved Boost Power Factor Corrector on Two Stage AC/DC PFC Converter (2단 역률보상회로를 구성하는 Interleaved 승압형 컨버터의 해석 및 설계)

  • 허태원;손영대;김동완;김춘삼;박한석;우정인
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.52 no.7
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    • pp.343-351
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    • 2003
  • In this paper, interleaved boost converter is applied as a first-stage converter in switch mode power supply. The first-stage converter plays a role to improve power factor. Interleaved Boost Power Factor Corrector(IBPFC) can reduce input current ripple as a single voltage control loop only without inner current loop, because input current is divided each 50% by two switching devices. Each converter cell is also operated in discontinuous current mode and inductor current of each converter is discontinuous. Total input current which is composed by each converter cell is continuous current. Thus, IBPFC is able to improve input current ripple. IBPFC operating in discontinuous current mode can be classified as six modes from switching state and be carried out state space averaging small signal modeling. A control transfer function is obtained according to the modeling. Not only steady-state characteristics but also dynamic characteristics is considered. Single voltage control loop is also constructed by the control transfer function. From experimental result, improvement of power factor and input current ripple are verified.

A Study on the Effects of SMVEs Export Modes on Export Amount and Period

  • Coo, Byung-Mo
    • The Journal of Industrial Distribution & Business
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    • v.9 no.1
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    • pp.39-49
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    • 2018
  • Purpose - This present aims to analyze the effect of export modes on initial export amount and time to export by selecting export modes among various success strategies and factors. Research design, data, and methodology - It surveyed 980 small and mid-sized venture enterprises across Korea. The export modes and its impact on exports through frequency analysis and cross analysis, and validated through a PPML(regression analysis applied the enterprise growth model) analysis. Results - Five export modes were investigated : direct export, indirect export, transfer from direct export to indirect export, transfer from direct export to indirect export, and parallel export to indirect export. It was found that SMVEs that exported directly from establishment to initial export had the shortest period, and also had the highest export price Conclusions - From a marketing point of view, it took an average of 1.6 years to switch from export directly to indirect export or directly export, and the reason for the export modes conversion was to supplement export specialists and improve export competitiveness. And the export amount and time period that SMVEs establishes and export is a significant factor in export success strategy and there has been few prior study in export modes.

Performance Analysis of Input-Output Buffering ATM Switch with Output-port Expansion Mechanism (출력포트 확장 방식을 사용한 입출력 버퍼형 ATM 교환기에서의 성능 비교 분석)

  • Kwon, Se-Dong;Park, Hyun-Min
    • The KIPS Transactions:PartC
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    • v.9C no.4
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    • pp.531-542
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    • 2002
  • An input and output buffering ATM switch conventionally operates in either Queueloss mode or Backpressure mode. Recently, a new mode, which is called Hybrid mode, was proposed to overcome the drawbacks of Queueloss mode and Backpressure mode. In Hybrid mode, when both the destined output buffer and the originfted input buffer are full, a cell is dropped. This thesis analyzes the cell loss rate and the cell delay of Queueloss, Backpressure and Hybrid modes in a switch adopting output-port expansion scheme under uniform traffic. Output-port expansion scheme allows only one cell from an input buffer to be switched during one time slot. If several cells switch to a same destined output port, the number of maximum transfer cells is restricted to K (Output-port expansion ratio). The simulation results show that if an offered load is less than 0.9, Hybrid mode has lower cell loss rate than the other modes; otherwise, Queueloss mode illustrates the lowest cell loss rate, which is a different result from previous researches. However, the difference between Hybrid and Queueloss modes is comparably small. As expected, the average cell delay in Backpressure mode is lower than those of Queueloss mode and Hybrid mode, since the cell delay due to the retransmission of higher number of dropped cells in Backpressure mode is not considered.

Design of pHEMT channel structure for single-pole-double-throw MMIC switches (SPDT 단일고주파집적회로 스위치용 pHEMT 채널구조 설계)

  • Mun Jae Kyoung;Lim Jong Won;Jang Woo Jin;Ji, Hong Gu;Ahn Ho Kyun;Kim Hae Cheon;Park Chong Ook
    • Journal of the Korean Vacuum Society
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    • v.14 no.4
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    • pp.207-214
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    • 2005
  • This paper presents a channel structure for promising high performance pseudomorphic high electron mobility transistor(pHEMT) switching device for design and fabricating of microwave control circuits, such as switches, phase shifters, attenuators, limiters, for application in personal mobile communication systems. Using the designed epitaxial channel layer structure and ETRI's $0.5\mu$m pHEMT switch process, single pole double throw (SPDT) Tx/Rx monolithic microwave integrated circuit (MMIC) switch was fabricated for 2.4 GHz and 5 GHz band wireless local area network (WLAN) systems. The SPDT switch exhibits a low insertion loss of 0.849 dB, high isolation of 32.638 dB, return loss of 11.006 dB, power transfer capability of 25dBm, and 3rd order intercept point of 42dBm at frequency of 5.8GHz and control voltage of 0/-3V These performances are enough for an application to 5 GHz band WLAN systems.

The Study of Single Phase Source Stability consider for The DSC Cell's Operation Character by Controlled Feed-back Circuit

  • Lee, Hee-Chang
    • Journal of information and communication convergence engineering
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    • v.4 no.4
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    • pp.170-173
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    • 2006
  • Recently, with increasing efficiency of DSC (photo-electrochemical using a nano-particle), The Performance of DSC solar generation system also needs improvement. The approach consists of a Fly-back DC-DC (transfer ratio 1:10) converter to boost the DSC cell voltage to 300VDC. The four switch (MOSFET) inverter is employed to produce 220V, 60Hz AC outputs. High performance, easy manufacturability, lower component count., safety and cost are addressed. Protection and diagnostic features form an important part of the design. Another highlight of the proposed design is the control strategy, which allows the inverter to adapt to the: requirements of the load as well as the power source. A unique aspect of the design is the use of the DSP TMS320LF2406 to control the inverter by current and voltage feed-back. Efficient and smooth control of the: power drawn from the DSC Cell is achieved by controlling the front end DC-DC converter in current mode.

A Study on the Design of a Pulse-Width Modulation DC/DC Power Converter

  • Lho, Young-Hwan
    • International Journal of Aeronautical and Space Sciences
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    • v.11 no.3
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    • pp.201-205
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    • 2010
  • DC/DC Switching power converters are commonly used to generate regulated DC output voltages with high-power efficiencies from different DC input sources. A switching converter utilizes one or more energy storage elements such as capacitors, or transformers to efficiently transfer energy from the input to the output at periodic intervals. The fundamental boost converter studied here consists of a power metal-oxide semiconductor field effect transistor switch, an inductor, a capacitor, a diode, and a pulse-width modulation circuit with oscillator, amplifier, and comparator. A buck converter containing a switched-mode power supply is also studied. In this paper, the electrical characteristics of DC/DC power converters are simulated by simulation program with integrated circuit emphasis (SPICE). Furthermore, power efficiency was analyzed based on the specifications of each component.

Simulation and Design of ACRDCL Inverter Using SPICE (SPICE를 이용한 ACRDCL 인버터의 시뮬레이션 및 설계)

  • Han, Soo-Bin;Jung, Bong-Man;Kim, Gyu-Duck;Choi, Soo-Hyun
    • Proceedings of the KIEE Conference
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    • 1994.07a
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    • pp.435-437
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    • 1994
  • Cramped resonant DC link inverter is analyzed by widely available software such as SPICE. In this paper, the model of ACRDCL which is based on converter switch function rather than actual circuit configuration is used. Power circuit is modeled by functional transfer function and the controller is based on the macro-model. Computer memory and runtime are based reduced compared to micro-model. Overall performance including control strategy and harmonic characteristics in the steady state can be analyzed easily.

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