• 한국전자통신학회논문지
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• 제16권3호
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• pp.477-484
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• 2021

본 연구를 통해 설계된 Portable ESS를 위한 4kW급 인버터는 휴대용에 걸맞게 수동소자(캐패시터, 인덕터 등)의 부피를 줄여 경량화 및 높은 전력밀도를 달성하고, MOSFET의 낮은 온저항을 통해 MOSFET의 열손실을 최소화하여 높은 효율을 달성할 수 있도록 했다. 또한, 높은 품질의 에너지 전달을 위해 현행 한전 영업업무처리지침기준에 따라 낮은 THDV를 가지도록 설계되어 왜곡이 낮은 정현파가 출력되도록 설계되었다.

• Journal of Advanced Marine Engineering and Technology
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• 제40권3호
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• pp.223-227
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• 2016

다이오드를 이용한 정류기는 산업현장에서 널리 응용되고 있다. 그러나 입력전류에 많은 저차고조파가 포함되어 공급전압을 왜곡시켜 전력의 품질을 저하시키므로 이를 완화시킬 수 있는 적절한 설비가 필요하다. 또한 고조파 전류는 전력계통의 전압 왜곡, 가열 및 소음 등을 유발하여 효율을 떨어뜨린다. 고조파를 감소시키고 역률을 상승시키기 위하여 입력전류가 연속적이 되도록 하는 부스트 컨버터가 등장하였다. 본 논문에서는 입력전류에 포함된 고조파 전류를 감소시키고, 역률을 증가시킬 수 있을 뿐 아니라 전체 정류기 효율을 상승시키는 부스트 컨버터를 제안하였다. 이는 기존의 부스트 컨버터에 비해 전류가 통과하는 반도체의 개수가 감소하여 효율의 상승을 기대할 수 있다. 또한, 소프트웨어 PSIM을 활용하여 제안된 변환기의 유효성을 입증하였다.

• 전력전자학회논문지
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• 제25권2호
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• pp.73-78
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• 2020

In this study, a novel reactive power control scheme is proposed to supply stable reactive power to the distribution line by compensating a ripple voltage of DC link. In a single-phase system, a magnitude of second harmonic is inevitably generated in the DC link voltage, and this phenomenon is further increased when the capacity of DC link capacitor decreases. Reactive power control was performed by controlling the d-axis current in the virtual synchronous reference frame, and the voltage control for maintaining the DC link voltage was implemented through the q-axis current control. The proposed method for compensating the ripple voltage was classified into three parts, which consist of the extraction unit of DC link voltage, high pass filter (HPF), and time delay unit. HPF removes an offset component of DC link voltage extracted from integral, and a time delay unit compensates the phase leading effect due to the HPF. The compensated DC voltage is used as feedback component of voltage control loop to supply stable reactive power. The performance of the proposed algorithm was verified through simulation and experiments. At DC link capacitance of 375 uF, the magnitude of ripple voltage decreased to 8 Vpp from 74 Vpp in the voltage control loop, and the total harmonic distortion of the current was improved.

• Journal of Power Electronics
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• 제18권6호
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• pp.1729-1750
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• 2018

Voltage source inverters (VSIs) are widely used to drive induction motors in industry applications. The quality of output waveforms depends on the switching sequences used in pulse width modulation (PWM). In this work, all existing optimal space vector pulse width modulation (SVPWM) switching strategies are studied. The performance of existing SVPWM switching strategies is optimized to realize a tradeoff between quality of output waveforms and switching losses. This study generalizes the existing optimal switching sequences for total harmonic distortions (THDs) and switching losses for different modulation indexes and reference angles with a parameter called quality factor. This factor provides a common platform in which the THDs and switching losses of different SVPWM techniques can be compared. The optimal spatial distribution of each sequence is derived on the basis of the quality factor to minimize harmonic current distortions and switching losses in a sector; the result is the minimum ripple loss SVPWM (MRSLPWM). By employing the sequences from optimized switching maps, the proposed method can simultaneously reduce THDs and switching losses. Two hybrid SVPWM techniques are proposed to reduce line current distortions and switching losses in motor drives. The proposed hybrid SVPWM strategies are MRSLPWM 30 and MRSLPWM 90. With a low-cost PIC microcontroller (PIC18F452), the proposed hybrid SVPWM techniques and the quality of output waveforms are experimentally validated on a 2 kVA VSI based on a three-phase two-level insulated gate bipolar transistor.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.1024-1026
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• 2002

The active power filter(APF) is a good solution for elimination of harmonics, which is produced by the nonlinear loads such as static power converter, computer and so on. Our trademark of APF is a POSAPF-series, which was applied to Samsung Electronics corp, in January 2002, and which lines up from 50A to 500A. This equipment reduces total demanded distortion (TDD) by 2${\sim}$3%, which originally 11${\sim}$13%. This paper discusses the harmonic regulation, measurement and analysis, and describes control theories and design methods of POSAPF-series, and, finally, shows the experimental results of a real system.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.976-979
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• 2002

A new controller for switching audio power amplifier with digital PWM input is proposed- Bi-directional Saw-tooth Error Correction (BSEC). This control method for high quality switching amplifier is based on a pulsed edge correction approach using PWM audio signal input as a reference of power switching digital to analog converter. The proposed controller has excellent features such as wide error correction range and no limitation on the modulation index. The controller is implemented in the half-bridge class D amplifier and the performance is verified through hardware experiments. It delivers 100W into 4${\Omega}$ load with less than 0.2% of total harmonic distortion (THD) all over operating range and an maximum efficiency of 82%.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2010년도 추계학술대회 초록집
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• pp.79.1-79.1
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• 2010

현재까지의 연료전지 스택 고장 진단 방법은 스택의 전류와 각 셀 전압값을 측정하고 그 측정된 값을 계산함으로써 스택의 고장 여부를 판단하는 것이었다. 이러한 방법은 수백개 이상의 스택의 셀 전압을 2~4개 단위로 측정하기 때문에 백개 이상의 측정 채널이 필요하다. 또한, 스택 진단 시스템을 복잡하게 하여 신뢰성을 저하시킬 뿐만 아니라 가격 상승을 유발한다. 본 논문에서는 이러한 문제점을 해결하기 위해 THDA(전고조파왜율 분석) 방법을 제안하였다. THDA는 스택에 교류 전류를 주입하고 스택 양단의 전압을 측정하여 주입된 교류 전류의 THD를 구함으로써 연료전지 스택의 상태를 진단하는 방법이다.

• 제어로봇시스템학회논문지
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• 제13권10호
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• pp.970-977
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• 2007

Absolute position detector which is one of the major equipment in the field of factory automation, not only perceives the absolute position of the rotary machine but also outputs switch data according to the given angle. Absolute position detector is composed of sensor module and its controller. In this paper, a sensor driver is implemented using FPGA with VHDL. This chip has a less form factor than conventional circuit. A test shows reliable precision within THD(total harmonic distortion) of 0.2% which can be applicable commercially. Also, FPGA-based phase error compensation methods were newly discussed. In the future, more research will be conducted to enhance the precision by the introduction of 3-phase transformer.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.82-85
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• 2002

A compact rail to rail CMOS voltage follower is presented. The circuit is based on the symmetrical class AB voltage follower and can operate under supply voltages of ${\pm}$ 1.5 V. The proposed circuit has power dissipation of 5.2㎽ under quiescent condition and can drive ${\pm}$1.25 V to 250$\Omega$ load with a total harmonic distortion of less than 0.5 percent and cut off frequency of 237 ㎒. Although simple, the proposed circuit enables the output transistors to drive load efficiently.

• 전자공학회논문지B
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• 제31B권7호
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• pp.42-48
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• 1994

In this paper, a low power and high speed flash Analog-to-Digital Converter using current-mode concept is proposed. Current-mode approach offers a number of advantages over conventional voltage-mode approach, such as lower power consumption small chip area improved accuracy etc. Rescently this concept was applied to algorithmic A/D Converter. But, its conversion speed is limited to medium speed. Consequently this converter is not applicable to the high speed signal processing system. This ADC is fabricated in 1.2um double metal CMOS standard process. This ADC's conversion time is measured to be 7MHz, and power consumption is 2.0mW, and differential nonlinearity is less than 1.14LSB and total harmonic distortion is -50dB. The active area of analog chip is about 350 x 550u$m^2$. The proposed ADC seems suitable for a single chip design of digital signal processing system required high conversion speed, high resolution small chip area and low power consumption.