Journal of Power Electronics

The Korean Institute of Power Electronics (전력전자학회)
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Comparative Study of Minimum Ripple Switching Loss PWM Hybrid Sequences for Two-level VSI Drives

  • Vivek, G. (Department of Electrical Engineering, National Institute of Technology) ;
  • Biswas, Jayanta ;
  • Nair, Meenu D. (Department of Electrical Engineering, Karpagam College of Engineering) ;
  • Barai, Mukti (Department of Electrical Engineering, National Institute of Technology)
  • Received : 2017.10.14
  • Accepted : 2018.08.29
  • Published : 2018.11.20
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Abstract

Voltage source inverters (VSIs) are widely used to drive induction motors in industry applications. The quality of output waveforms depends on the switching sequences used in pulse width modulation (PWM). In this work, all existing optimal space vector pulse width modulation (SVPWM) switching strategies are studied. The performance of existing SVPWM switching strategies is optimized to realize a tradeoff between quality of output waveforms and switching losses. This study generalizes the existing optimal switching sequences for total harmonic distortions (THDs) and switching losses for different modulation indexes and reference angles with a parameter called quality factor. This factor provides a common platform in which the THDs and switching losses of different SVPWM techniques can be compared. The optimal spatial distribution of each sequence is derived on the basis of the quality factor to minimize harmonic current distortions and switching losses in a sector; the result is the minimum ripple loss SVPWM (MRSLPWM). By employing the sequences from optimized switching maps, the proposed method can simultaneously reduce THDs and switching losses. Two hybrid SVPWM techniques are proposed to reduce line current distortions and switching losses in motor drives. The proposed hybrid SVPWM strategies are MRSLPWM 30 and MRSLPWM 90. With a low-cost PIC microcontroller (PIC18F452), the proposed hybrid SVPWM techniques and the quality of output waveforms are experimentally validated on a 2 kVA VSI based on a three-phase two-level insulated gate bipolar transistor.

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References

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