• 전력전자학회논문지
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• 제9권1호
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• pp.65-72
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• 2004

본 논문에서는 새로운 형태의 부스트 입력방식의 공진형 AC/DC 컨버터를 제안하였다. 제안된 컨버터는 교류 전원측의 역률개선과 컨버터 출력전압을 동시에 제어하는 단일단 역률 개선방식으로써 전류 연속모드 펄스폭 변조방식을 통해 99%의 고역률을 얻을 수 있으며, 변압기 누설 인덕턴스와 공진 커패시터간의 공진을 이용하여 영전압스위칭을 구현할 수 있기 때문에 스위칭 손실을 줄일 수 있다. 제안된 컨버터의 이론적 고찰을 위해 각 모드별 전류로를 통해 동작을 설명하였으며, 정상상태에서의 DC해석을 이용한 공진특성 분석을 하였다. 본 논문에서는 제안된 컨버터의 유효성 확인을 위해 입력 $120[V_AC],\; 출력\; 48[V_DC],\; 4[A]\; 200[W]$급 프로토타입 컨버터를 제작하였으며 실험을 통해 얻은 결과를 제시함으로써 이를 증명하였다.

• Journal of Power Electronics
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• 제16권2호
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• pp.704-716
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• 2016

Small distributed generation units are usually connected to the main electric grid through single-phase voltage source inverters. Grid operating conditions such as voltage and frequency are not constant and can fluctuate within the range values established by international standards. Furthermore, the requirements in terms of power factor correction, total harmonic distortion, and reliability are getting tighter day by day. As a result, the implementation of reliable and efficient control algorithms, which are able to adjust their control parameters in response to changeable grid operating conditions, is essential. This paper investigates the configuration topology and control algorithm of a single-phase inverter with the purpose of achieving high performance in terms of efficiency as well as total harmonic distortion of the output current. Accordingly, a Second Order Generalized Integrator with a suitable Phase Locked Loop (SOGI-PLL) is the basis of the proposed current and voltage regulation. Some practical issues related to the control algorithm are addressed, and a solution for the control architecture is proposed, based on resonant controllers that are continuously tuned on the basis of the actual grid frequency. Further, intentional islanding operation is investigated and a possible procedure for switching from grid-tied to islanding operation and vice-versa is proposed.

• Journal of Power Electronics
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• 제16권2호
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• pp.786-797
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• 2016

This paper describes the design and development of a novel semiconductor-based solid-state switch for damped oscillating voltage test system. The proposed switch is configured as two identical series-connected switch stacks, each of which comprising 10 series-connected IGBT function units. Each unit consists of one IGBT, a gate driver, and an auxiliary voltage sharing circuit. A single switch stack can block 20 kV-rated high voltage, and two stacks in series are proven applicable to 30 kV-rated high voltage. The turn-on speed of the switch is approximately 250 ns. A flyback topology-based power supply system with a front-end power factor correction is built for the drive circuit by loosely inductively coupling each unit with a ferrite core to the primary side of a power generator to obtain the advantages of galvanic isolation and compact size. After the simulation, measurement, and estimation of the parasitic effect on the gate driver, a prototype is assembled and tested under different operating regimes. Experimental results are presented to demonstrate the performance of the developed prototype.

• Journal of Power Electronics
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• 제12권3호
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• pp.377-386
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• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

• IEIE Transactions on Smart Processing and Computing
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• 제3권3호
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• pp.142-152
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• 2014

Vehicular Ad-hoc Networks (VANETs) are comprised of wireless mobile nodes characterized by a randomly changing topology, high mobility, availability of geographic position, and fewer power constraints. Orthogonal Frequency Division Multiplexing (OFDM) is a promising candidate for the physical layer of VANET because of the inherent characteristics of the spectral efficiency and robustness to channel impairments. The susceptibility of OFDM to Inter-Carrier Interference (ICI) is a challenging issue. The high mobility of nodes in VANET causes higher Doppler shifts, which results in ICI in the OFDM system. In this paper, a frequency domain com-btype channel estimation was used to cancel out ICI. The channel frequency response at the pilot tones was estimated using a Least Square (LS) estimator. An efficient interpolation technique is required to estimate the channel at the data tones with low interpolation error. This paper proposes a robust interpolation technique to estimate the channel frequency response at the data subcarriers. The channel induced noise tended to degrade the Bit Error Rate (BER) performance of the system. Parallel concatenated Convolutional codes were used for error correction. At the decoding end, different decoding algorithms were considered for the component decoders of the iterative Turbo decoder. A performance and complexity comparison among the various decoding algorithms was also carried out.

• 반도체디스플레이기술학회지
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• 제7권2호
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• pp.23-27
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• 2008

Recently, regulation for THD (Total Harmonic Distortion) such as IEC 61000-3-2, IEEE 519 is being reinforced about a product which directly connects to AC line in order to prevent distortion of common power source in electronic equipment and electrical machinery. In order to satisfy these regulations, conventional circuits were used two-stage structure attached power factor correction circuit at ahead of converter but this method complicate the circuit and then a number of element increases thereupon the cost of production rises. in this paper, we propose a high efficiency single-stage 300W PFC fly-back converter that improved power factor and efficiency than conventional two-stage power module.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제4B권3호
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• pp.127-133
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• 2004

This paper presents a prototype of three-phase current source zero voltage soft-switching PWM controlled PFC rectifier with Single Active Auxiliary Resonant Commutated Snubber (ARCS) circuit topology. The proposed three-phase PFC rectifier with sinewave current shaping and unity power factor scheme can operate under a condition of Zero Voltage Soft Switching (ZVS) in the main three phase rectifier circuit and zero current soft switching (ZCS) in auxiliary snubber circuits. The operating principle and steady-state performances of the proposed three-phase current source soft-switching PWM controlled PFC rectifier controlled by the DSP control implementation are evaluated and discussed on the basis of the experimental results of this active rectifier setup.

• 전력전자학회논문지
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• 제7권1호
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• pp.18-29
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• 2002

기존의 역률 개선 컨버터는 경 부하에서 높은 직류 링크 전압을 갖는다. 특히 라인 전압이 높고 부하가 작을 경우, 직류 링크 전압은 매우 높은 전압을 갖게 되어 실용상 문제가 존재한다. 본 논문에서 역률 개선 부로 벅 토폴로지를 갖는 새로운 단일 전력 단 역률 개선 컨버터를 제안하였다. 또한 제안된 컨버터의 타당성을 증명하기 위해 제안된 회로의 설계 예를 보였으며, 설계 시 고려되어야 할 사항들과 관련 설계 식을 유도하였다. 유도된 설계 식으로부터 정해진 회로 정수 값을 이용하여 실험을 실시하였고, IEC1000-3-2의 역률 규제를 만족함을 입증하였다. 본 논문에서 제안된 컨버터를 통하여 기존의 단일 전력 단 컨버터의 문제점인 경 부하 시 높은 직류 링크 전압 문제를 해결할 수 있었다.

• Journal of Power Electronics
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• 제17권4호
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• pp.1088-1096
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• 2017

Load variations on a distribution line result in voltage fluctuations at the point of common coupling (PCC). In order to keep the magnitude of the PCC voltage constant at its rated value and obtain zero voltage regulation (ZVR), a D-STATCOM is installed for voltage correction. Moreover, the ZVR mode of a D-STATCOM can also be used to balance the source current during unbalanced loading. For medium voltage and high power applications, a D-STATCOM is realized by the cascaded H-bridge topology. In the ZVR mode, the D-STATCOM may draw unbalanced current and in this process is required to handle different phase powers leading to deviations in the cluster voltages. Zero sequence voltage needs to be injected for ZVR mode, which creates circulating power among the phases of the D-STATCOM. The computed zero sequence voltage and the individual DC capacitor balancing controller help the DC cluster voltage follow the reference voltage. The effectiveness of the control scheme is verified by modeling the system in MATLAB/SIMULINK. The obtained simulations are further validated by the experimental results using a dSPACE DS1106 and five-level D-STATCOM experimental set up.

• 한국산업융합학회 논문집
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• 제24권4_1호
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• pp.377-385
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• 2021

High voltage direct current(HVDC) systems has been an alternative method of a power transmission to replace high voltage alternate current(HVAC), which is a traditional AC transmission method. Due to technical limitations, Line commutate converter HVDC(LCC-HVDC) was mainly used. However, result from many structural problems of LCC-HVDC, the voltage source converter HVDC(VSC-HVDC) are studied and applied recently. In this paper, after analyzing the reactive power and output voltage ripple, which are the main problems of LCC-HVDC, the characteristics of each HVDC are summarized. Based on this result, a new LCC-HVDC structure is proposed by combining LCC-HVDC with the MMC structure, which is a representative VSC-HVDC topology. The proposed structure generates lower reactive power than the conventional method, and greatly reduces the 12th harmonic, a major component of output voltage ripple. In addition, it can be easily applied to the already installed LCC-HVDC. When the proposed method is applied, the control of the reactive power compensator becomes unnecessary, and there is an advantage that the cut-off frequency of the output DC filter can be designed smaller. The validity of the proposed LCC-HVDC is verified through simulation and experiments.