• Journal of the Korean Society for Heat Treatment
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• v.22 no.6
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• pp.354-360
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• 2009

This paper reports the oxidation mechanism of epitaxial Ni thin films grown on GaN/sapphire(0001) substrates, investigated by real-time x-ray diffraction and scanning electron microscopy. At the initial stage of oxidation process, a thin NiO layer with a thickness of ${\sim}50\;{\AA}$ was formed on top of the Ni films. The growth of such NiO layer was saturated and then served as a passive oxide layer for the further oxidation process. For the second oxidation stage, host Ni atoms diffused out to the surfaces of initially formed NiO layer through the defects running vertically to form NiO grains, while the sites that were occupied by host Ni, became voids. The crystallographic properties of resultant NiO films, such as grain size and mosaic distribution, rely highly on the oxidation temperatures.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.67.2-67.2
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• 2012

Graphene is expected to have a significant impact in various fields in the foreseeable future. For example, graphene is considered to be a promising candidate to replace indium tin oxide (ITO) as transparent conductive electrodes in optoelectronics applications. We report the tunability of the wavelength of localized surface plasmon resonance by varying the distance between graphene and Au nanoparticles [1]. It is estimated that every nanometer of change in the distance between graphene and the nanoparticles corresponds to a resonance wavelength shift of ~12 nm. The nanoparticle-graphene separation changes the coupling strength of the electromagnetic field of the excited plasmons in the nanoparticles and the antiparallel image dipoles in graphene. We also show a hysteresis in the conductance and capacitance can serve as a platform for graphene memory devices. We report the hysteresis in capacitance-voltage measurements on top gated bilayer graphene which provide a direct experimental evidence of the existence of charge traps as the cause for the hysteresis [2]. By applying a back gate bias to tune the Fermi level, an opposite sequence of switching with the different charge carriers, holes and electrons, is found [3]. The charging and discharging effect is proposed to explain this ambipolar bistable hysteretic switching.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.849-851
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• 2015

본 연구에서는 비대칭 이중게이트 MOSFET의 상하단 게이트 산화막 두께 비에 대한 문턱전압이하 스윙 및 전도중심의 변화에 대하여 분석하고자한다. 문턱전압이하 스윙은 전도중심에 따라 변화하며 전도중심은 상하단의 산화막 두께에 따라 변화한다. 비대칭 이중게이트 MOSFET는 상단과 하단의 게이트 산화막 두께를 다르게 제작할 수 있어 문턱전압이하 스윙의 저하 등 단채널효과를 감소시키기에 유용한 소자로 알려져 있다. 본 연구에서는 포아송방정식의 해석학적 해를 이용하여 문턱전압이하 스윙을 유도하였으며 상하단의 산화막두께 비가 전도중심 및 문턱전압이하 스윙에 미치는 영향을 분석하였다. 결과적으로 문턱전압이하 스윙 및 전도중심은 상하단 게이트 산화막 두께 비에 따라 큰 변화를 나타냈다. 또한 채널길이 및 채널두께, 상하단게이트 전압 그리고 도핑분포함수의 변화에 따라 문턱전압이하 스윙 및 전도중심은 상호 유기적으로 변화하고 있다는 것을 알 수 있었다.

• Proceedings of the Optical Society of Korea Conference
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• 2001.02a
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• pp.2-3
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• 2001

Characteristics of two-dimensional slab photonic crystal lasers will be summarized. Room temperature c.w operation is demonstrated at 1.6 $\mu\textrm{m}$ by using InGaAsP slab-waveguide triangular photonic crystal on top of wet-oxidized aluminum oxide. Recently, 2-D PBG structures have attracted a great deal of attention due to their simplicity in fabrication and theoretical study as compared to the three-dimensional counterparts [1]. Air-guided 2-D slab PBG lasers were reported by Caltech group (2). However, this air-slab structure is mechanically fragile and thermally unforgiving. Therefore, a new structure that can remove this thermal limitation is dearly sought after for 2-D PBG laser to have practical meaning. In this talk, we report room-temperature continuous operation of 2-D photonic bandgap lasers that are thermally and mechanically stable.(omitted)

• Journal of the Semiconductor & Display Technology
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• v.2 no.4
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• pp.31-35
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• 2003

We present a formation technique of thin film heater for heat transfer components. Thin film structures of Cr-Si have been prepared on top of alumina substrates by magnetron sputtering. More samples of Mo thin films were prepared on silicon oxide and silicon nitride substrates by electron beam evaporation technology. The electrical properties of the thin film structures were measured up to the temperature of $500^{\circ}C$. The thickness of the thin films was ranged to about 1 um, and a post annealing up to $900^{\circ}C$ was carried out to achieve more reliable film structures. In measurements of temperature coefficient of resistance (TCR), chrome-rich films show the metallic properties; whereas silicon-rich films do the semiconductor properties. Optimal composition between Cr and Si was obtained as 1 : 2, and there is 20% change or less of surface resistance from room temperature to $500^{\circ}C$. Scanning electron microscopy (SEM) and Auger electron spectroscopy (AES) were used for the material analysis of the thin films.

• Journal of the Semiconductor & Display Technology
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• v.3 no.4
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• pp.29-32
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• 2004

Fully depleted Silicon-on-Insulator (FD-SOI) devices lead to better electrical characteristics than bulk CMOS devices. However, the presence of a thin top silicon layer and a buried SiO2 layer causes self-heating due to the low thermal conductivity of the buried oxide. The electrical characteristics of FDSOI devices strongly depend on the path of heat dissipation. In this paper, we present a new three-dimensional (3-D) analysis technique for the self-heating effect of the finger-type and bar-type transistors. The 3-D analysis results show that the drain current of the finger-type transistor is 14.7% smaller than that of the bar-type transistor due to the 3-D self-heating effect. We have learned that the rate of current degradation increases significantly when the width of a transistor is smaller that a critical value in a finger-type layout. The current degradation fro the 3-D structures of the finger-type and bar-type transistors is investigated and the design issues are also discussed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.12
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• pp.813-820
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• 2015

We have studied commercialization and process optimization of protective film on transparent conductive coated substrate, nano silver on flexible PET (poly ethylene terephthalate), by means of roll-to-roll micro-gravure coater. Nanosilver on flexible PET substrate is potential materials to replace ITO (indium tin oxide). Protective film is most important to maintain unique silver pattern on top of transparent PET. PSA pressure sensitive adhesives) was developed solely for nano silver on PET and protective film was successfully laminated. We have optimized all process conditions such as coating thickness, line speed and aging time & temperature via experimental design. Transparent conductive film and its protective film developed in this research are commercially available at this moment.

• Journal of the Semiconductor & Display Technology
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• v.1 no.1
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• pp.9-13
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• 2002

A polyimide-type electrostatic chuck (ESC) was fabricated for the application of holding 8-inch silicon wafers in the oxide etching equipment. For the fabrication of the unipolar ESC, core technologies such as coating of polyimide films and anodizing treatment of aluminum surface were developed. The polyimide films were prepared on top of thin coated copper substrates for the good electrical contacts, and the helium gas cooling technique was used for the temperature uniformity of the silicon wafers. The ESC was essentially working with an unipolar operation, which was easier to fabricate and operate compared to a bipolar operation. The chucking force of the ESC has been measured to be about 580 gf when the applied voltage was 1.5 kV, which was considered to be enough force to hold wafers during the dry etching processing. The employment of the ESC in etcher system could make 8% enhancement of the wafer processing yield.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.522-523
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• 2005

Top emission OLED 소자에 사용되는 ITO(Indium-Tin-Oxide)의 저항을 개선하여 보다 낮은 저항을 가지는 전극을 제작하기 위해 AZO(ZnO-Ag-ZnO)를 제작하였다. AZO박막은 기존의 ITO박막이 수십 $\Omega$을 나타내던 것과 비교하여 $8\Omega$으로 매우 낮은 저항을 나타내었다. 투과율은 84%로 기존의 ITO박막과 유사한 성능을 나타내었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.485-486
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• 2006

Top emission OLED 소자에 사용되는 ITO(Indium-Tin-Oxide)의 저항을 개선하여 보다 낮은 저항을 가지는 전극을 제작하기 위해 AZO(ZnO-Ag-ZnO)를 제작하였다. AZO박막은 기존의 ITO박막이 수십 $\Omega$을 나타내던 것과 비교하여 $8{\Omega}$으로 매우 낮은 저항을 나타내었다 투과율은 84%로 기존의 ITO박막과 유사한 성능을 나타내었다.