• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.132-135
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• 2000

We have been aware fer some time. that it is becoming harder to develop ASIC only, using the vendor wire model for the current top-down/bottom-up process. Because VDSM has a much bigger wired delay than cell delay, it is also difficult to reduce development time, as well as time-to-market, while developing several million gate ASIC's. The same is true for high frequency ASIC's with VDSM (which have larger wire delay versus cell delay). Therefore, a solution called “RTS-GDS”, using physical constraints fur SOC with timing met, is being actively discussed. This paper suggests a methodology for SOC development by utilizing a top down flow via CWLM along with discussing potential problems. This paper also provides a design flow, including physical synthesis, DFT, floor plan and CWLM, all of which are relevant to proper SOC development.

• Journal of Institute of Control, Robotics and Systems
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• v.21 no.3
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• pp.187-193
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• 2015

When developing a vehicle control system, simulation methods are widely used to validate the whole system in the early development phase. With this regard, the simulator should correctly behave just like the real parts that are not yet implemented while interacting with already implemented parts in real-time. However, most simulators cannot provide functionally and temporally accurate behaviors of the target system. In order to overcome this limitation, this paper proposes a novel real-time simulation technique that can efficiently simulate the temporal behavior as well as the functional behavior of the simulation target system.

• The Journal of Natural Sciences
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• v.7
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• pp.115-120
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• 1995

Imprecise computation has been suggested as a promising model of real-time computing in order to deal with timing constraints imposed by the environment. However, the theoretical foundation of the technique has not been fully explored. To address this, a decision-theoretic foundation of imprecise computation is proposed. The main benefit of such a treatment is that it enables the qualitative assumptions underlying imprecise computation techniques to be explicitly stated in a formal way. The theoretical foundation laid out in this paper, hence, will not only enable the justification of using imprecise computation techniques for a real-time application, but will also facilitate the development of extended techniques for more complexs real-time systems.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.653-656
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• 2000

We consider, in this paper, a UML-based design support system for real-time systems. However, the UML does not include any notion for verification of timing constraints. We presents transformation algorithms, as a function of the support system, of UML descriptions into Petri nets and Interval Temporal Logic models, which are very powerful for the verification. This paper shows also transformation example for simple elevator system.

• Journal of KIISE:Computing Practices and Letters
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• v.6 no.6
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• pp.620-627
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• 2000

실시간 프로그램은 다양한 응용분야에 중요하게 이용되고 있는데, 기존의 일반 언어는 시간적인 개념을 고려하여 설계하지 않았으므로 실시간 응용에 부적합하며, 이를 해결하기 위한 실시간 언어는 시간 개념을 표현하기 위하여 많은 문법이 추가되어 기존 프로그래머에 익숙치 못한 결점이 있다. 본 연구에서는 기존의 C언어에 익숙한 프로그래머들이 저항감 없이 실시간 프로그래밍을 할 수 있는 언어를 설계하고 구현한다. 이 구현에서는 시간 트리를 이용함으로써 원시 언어와 목적 언어의 연결이 가능하며, 정적 분석을 이용한 결과를 코드 생성에 이용함으로써 외부적인 타이머 없이 시간적인 사건의 처리가 가능하다.

• Proceedings of the Korean Information Science Society Conference
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• 2001.10a
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• pp.610-612
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• 2001

시간 제약 조건을 가진 타임드 페트리넷으로부터 최적화된 비동기식 제어회로를 생성하기 위해서는 시간 분석을 통하여 도달 가능한 상태만으로 구성된 축소 상태 그래프를 생성하는 작업이 매우 중요하다. 본 논문에서는 기존의 방법들이 적용 가능한 타임드 페트리넷의 범주에 제약을 가하거나 혹은 회로의 합성과는 직접적인 상관없이 시간 분석을 위하여 대규모의 시간 상태 그래프를 부가적으로 생성하는 문제를 해결하기 위하여 타임드 페트리넷으로부터 축소된 시간 상태 그래프를 직접적으로 생성하는 방법을 제안 한다 실험 결과는 제안된 방법이 모든 범주의 타임드 페트리넷으로부터 빠른 시간 내에 합성에 충분한 축소된 상태그래프를 생성함을 보여준다.

• Journal of KIISE:Databases
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• v.29 no.3
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• pp.230-245
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• 2002

Database systems for real-time applications must satisfy timing constraints associated with transactions. Typically, a timing constraint is expressed in the form of a deadline and is represented as a priority to be used by schedulers. Recently, security has become another important issue in many real-time applications. In many systems, sensitive information is shared by multiple users with different levees of security clearance. As more advanced database systems are being used in applications that need to support timeliness while managing sensitive information, there is an urgent need to develop concurrency control protocols in transaction management that satisfy both timing and security requirements. In this paper, we propose two concurrence control protocols that ensure both security and real-time requirements. The proposed protocols are primarily based on multiversion locking. However, in order to satisfy timing constraint and security requirements, a new method, called the FREEZE, is proposed. In addition, we show that our protocols work correctly and they provide a higher degree of concurrency than existing multiversion protocols. We Present several examples to illustrate the behavior of our protocols, along with performance comparisons with other protocols. The simulation results show that the proposed protocols can achieve significant performance improvement.

• Journal of Positioning, Navigation, and Timing
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• v.7 no.3
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• pp.127-138
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• 2018

Spoofing attacks including meaconing can provide a bogus position to a victim GPS receiver, and those attacks are notably difficult to detect at the point of view on the receiver. Several countermeasure techniques have been studied to detect, classify, and cancel the spoofing signals. Based on the countermeasure techniques, we have developed an anti-spoofing equipment that detects and mitigates or eliminates the spoofing signal based on raw measurements. Although many anti-spoofing techniques have been studied in the literatures, the evaluation test system is not deeply studied to evaluate the anti-spoofing equipment, which includes detection, mitigation, and elimination of spoofing signals. Each study only has a specific test method to verify its anti-spoofing technique. In this paper, we propose the performance evaluation test system that includes both spoofing signal injection system and its injection scenario with the constraints of stand-alone anti-spoofing techniques. The spoofing signal injection scenario is designed to drive a victim GPS receiver that moves to a designed position, where the mitigation and elimination based anti-spoofing algorithms can be successively evaluated. We evaluate the developed anti-spoofing equipment and a commercial GPS receiver using our proposed performance evaluation test system. Although the commercial one is affected by the test system and moves to the designed position, the anti-spoofing equipment mitigates and eliminates the injected spoofing signals as planned. We evaluate the performance of anti-spoofing equipment on the position error of the circular error probability, while injecting spoofing signals.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.3
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• pp.571-578
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• 2012

In this paper, we propose two main points. The first is the constraint for logic synthesis, and the second is an efficient logic synthesis method. Logic synthesis is a process to obtain the gate-level netlist from RTL (register transfer level) codes using logic mapping and optimization with the specified constraints. The result of logic synthesis is tightly dependent on constraint and logic synthesis method. Since the size and timing can be dramatically changed by these, we should precisely consider them. In this paper, we present the considering items in the process of logic synthesis by using our experience and experimental results. The proposed techniques was applied to a circuit with the hardware resource of about 650K gates. The synthesis time for the hybrid method was reduced by 47% comparing the bottom-up method and It has better timing property about slack than top-down method.

• Journal of Positioning, Navigation, and Timing
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• v.10 no.3
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• pp.179-187
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• 2021

To estimate the location of the train, we consider an integrated navigation system that combines Inertial Navigation System (INS) and Global Navigation Satellite System (GNSS). This system provides accurate navigation results in open sky by combining only the advantages of both systems. However, since measurement update cannot be performed in GNSS signal blocked areas such as tunnels, mountain, and urban areas, pure INS is used. The error of navigation information increases in this area. In order to reduce this problem, the train's Non-Holonomic Constraints (NHC) information can be used. Therefore, we deal with the INS/GNSS/NHC integrated navigation system in this paper. However, in the process of installing the navigation system on the train, a Mounting Misalignment Error of the IMU (MMEI) inevitably occurs. In this case, if the NHC is used without correcting the error, the navigation error becomes even larger. To solve this problem, a method of easily estimating the MMEI without an external device is introduced. The navigation filter is designed using the Extended Kalman Filter (EKF) by considering the MMEI. It is assumed that there is no vertical misalignment error, so only the horizontal misalignment error is considered. The performance of the integrated navigation system according to the presence or absence of the MMEI and the estimation performance of the MMEI according to the method of using NHC information are analyzed based on simulation. As a result, it is confirmed that the MMEI is accurately estimated by using the NHC information together with the GNSS information, and the performance and reliability of the integrated navigation system are improved.