• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.3
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• pp.577-582
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• 2016

The synchronous TDC(Time-to-Digital Converter) of counter-type using current-conveyor is designed by $0.18{\mu}m$ CMOS process and the supply voltage is 3 volts. In order to compensate the disadvantage of a asynchronous TDC the clock is generated when the start signal is applied and the clock is synchronized with the start signal. In the asynchronous TDC the error range of digital output is from $-T_{CK}$ to $T_{CK}$. But the error range of digital output is from 0 to $T_{CK}$ in the synchronous TDC. The error range of output is reduced by the synchronization between the start signal and the clock when the timing-interval signal is converted to digital value. Also the structure of the synchronous TDC is simple because there is no the high frequency external clock. The operation of designed TDC is confirmed by the HSPICE simulation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.5A
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• pp.479-486
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• 2008

In this paper, an efficient training symbol design with m-sequence is proposed for the MIMO-OFDM based next generation wireless transmission system which supports gigabits per second data rate. In the traditional blute force method, the preamble design is based on the case by case comparison with the system requirements. This paper discusses a training symbol design methodology for the MIMO-OFDM system based on the m-sequence which has been widely used in the spread spectrum communication areas due to its good correlation characteristics. Also the step-by-step design and performance verification method within the limited search space is discussed. The proposed method targets the design of the training symbol which satisfies system requirements for the packet based MIMO-OFDM wireless communication system including automatic gain control(AGC), timing synchronization, frequency and sampling offset estimation, and MIMO channel estimation.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.1
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• pp.70-77
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• 2008

On the wireless sensor network MAC protocols, one of main issues is energy enciency. Since several asynchronous wireless sensor network MAC protocols with short preamble sampling scheme can be operated without setting the timing synchronization among neighbor nodes, it consumes a little energy for maintaining protocols. However, each node encounters either preamble or data overhearing problem, because each node wakes up in a different time and must check whether the frame is being sent to itself or not. To solve this overhearing problem, we newly propose B-MAC++ that can reduce the overhearing energy consumption by using short preambles with destination address and payload length. from simulation results, we show that the proposed B-MAC++ has advantageous in terms of power consumption efficiency over other asynchronous wireless sensor network MAC protocols.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.7
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• pp.1797-1806
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• 1998

Future satellite communication systems will be developed at Ka-band (20/30 GHz) owing to the relatively wide frequency allocation and current freedom from terrestrial interference for multimedia services. A serious disadvantage of the Ka-band, however, is the very high atmospheric attenuation in rainy weather. Synchronous CDMA drastically redces the effect of self-noise with several interesting features of CDMA for mobile communications such as fixible freuqncy rese, the capability of performin soft-handover and a lower sensitivity to interference. This paper evaluates the performance of a synchronous CDMA reture link for a Ka-band geostationary satellite communication system. For a fixed satellite channel whose characteristics depend on weather conditions, the signal envelope and phase for this channel is modelled as Gaussian. The bit error and outage probability, and the detection loss due to imperfect chip timing synchronization is analytically evaluated and the system capacity degaradation due to the weather condition is estimated. The two cases consist of the general case in which all users are affected by rain condition, and the worst case in which the reference user is only affected by rain attenuation. the results for two cases of rain condition clearly show that synchronous CDMA eases the power control requirements and has less sensitivity to imperfect power control.

• Journal of Korea Multimedia Society
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• v.7 no.2
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• pp.251-263
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• 2004

The Synchronized Multimedia Integration Language (SMIL), recommended by the World Wide Web Consortium (W3C) in 1998, is an XML-based declarative language to synchronize and present multimedia documents. SMIL can create new multimedia data integrating various types of multimedia objects which exist separately such as text, video, graphics and audio. It can support synchronization of multimedia data which are limited in current HTML-based Web technology. For its popularity, it is required to develop a multimedia server guaranteeing Quality of Service (QoS), authoring tool and player. For developing a SMIL authoring tool and player, the technologies are essentially required to read and analyze a SMIL document and to play synchronized various types of media objects in a timeline. In this paper, we describe a design and implementation of an event processor which supports SMIL 2.0 timing model. Moreover, we also develop a SMIL 2.0 player using the proposed event processor. This will facilitate the play of SMIL contents, so that it can contribute to the prosperity of SMIL technology It is possible to reuse in various language profiles defined in the SMIL standard. This player is expected to be utilized in other standard integrating SMIL such as XHTML＋SMIL and SMIL Animation.

• Journal of KIISE:Computing Practices and Letters
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• v.9 no.3
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• pp.266-277
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• 2003

Every conceptual temporal rat relationship can be described using one of seven relations (before, meets, overlaps, during, starts, finishes, and equals ). The conceptual representation provides an efficient means for our multimedia authoring system to automatically fill in the necessary timing details. We developed a multimedia Presentation authoring system that supports a mechanism for conceptually representing the temporal relations of different media. Among the many editors that make up our system, the temporal relation editor provides users with an intuitive mechanism for representing the conceptual flow of a presentation by simple and direct graphical manipulations. Our system is based on the SMIL(Synchronized Multimedia Integration Language). The conceptual temporal relation editor and other editors of our system exchange their information in real-time and automatically generate SMIL codes through the SMIL Object Manager. Our system uses TRN(Temporal Relation Network) as its internal multimedia presentation representation. The TRN corresponds exactly to the structure seen in the graphical representation of the presentation. A parallel relationship found in a TRN can be collapsed into a single synchronization block. This facilitates the determination of the playing time of each component and can be the basic unit for reusability of already prepared blocks of presentation code.

• The KIPS Transactions:PartA
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• v.10A no.3
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• pp.247-254
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• 2003

This paper describes a Delay Locked Loop (DLL) with low supply voltage and wide lock range for Synchronous DRAM which employs Double Data Rate (DDR) technique for faster data transmission. To obtain high resolution and fast lock-on time, a new type of phase detector is designed. The new counter and lock indicator structure are suggested based on the Dual-clock dual-data Flip Flop (DCDD FF). The DCDD FF reduces the size of counter and lock indicator by about 70%. The delay line is composed of coarse and fine units. By the use of fast phase detector, the coarse delay line can detect minute phase difference of 0.2 nsec and below. Aided further by the new type of 3-step vernier fine delay line, this DLL circuit achieves unprecedented timing resolution of 25psec. This DLL spans wide locking range from 500MHz to 500MHz and generates high-speed clocks with fast lock-on time of less than 5 clocks. When designed using 0.25 um CMOS technology with 1.8V supply voltage, the circuit consumes 32mA at 500MHz locked condition. This circuit can be also used for other applications as well, such as synchronization of high frequency communication systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.6
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• pp.1210-1230
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• 1997

In this paper, we suggest an architecture of DS/CDMA tranceiver composed of one pilot channel used as reference and multiple traffic channels. The pilot channel-an unmodulated PN code-is used as the reference signal for synchronization of PN code and data demondulation. The coherent demodulation architecture is also exploited for the reverse link as well as for the forward link. Here are the characteristics of the suggested DS/CDMA system. First, we suggest an interlaced quadrature spreading(IQS) method. In this method, the PN coe for I-phase 1st channel is used for Q-phase 2nd channels and the PN code for Q-phase 1st channel is used for I-phase 2nd channel, and so on-which is quite different from the eisting spreading schemes of DS/CDMA systems, such as IS-95 digital CDMA cellular or W-CDMA for PCS. By doing IQS spreading, we can drastically reduce the zero crossing rate of the RF signals. Second, we introduce an adaptive threshold setting for the synchronization of PN code, an initial acquistion method that uses a single PN code generator and reduces the acquistion time by a half compared the existing ones, and exploit the state machines to reduce the reacquistion time Third, various kinds of functions, such as automatic frequency control(AFC), automatic level control(ALC), bit-error-rate(BER) estimator, and spectral shaping for reducing the adjacent channel interference, are introduced to improve the system performance. Fourth, we designed and implemented the DS/CDMA MODEM to be used for variable transmission rate applications-from 16Kbps to 1.024Mbps. We developed and confirmed the DS/CDMA MODEM architecture through mathematical analysis and various kind of simulations. The ASIC design was done using VHDL coding and synthesis. To cope with several different kinds of applications, we developed transmitter and receiver ASICs separately. While a single transmitter or receiver ASC contains three channels (one for the pilot and the others for the traffic channels), by combining several transmitter ASICs, we can expand the number of channels up to 64. The ASICs are now under use for implementing a line-of-sight (LOS) radio equipment.

• Sleep Medicine and Psychophysiology
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• v.4 no.1
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• pp.57-65
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• 1997

As jet lag of modern travel continues to spread, there has been an exponential growth in popular explanations of jet lag and recommendations for curing it. Some of this attention are misdirected, and many of those suggested solutions are misinformed. The author reviewed the basic science of jet lag and its practical outcome. The jet lag symptoms stemed from several factors, including high-altitude flying, lag effect, and sleep loss before departure and on the aircraft, especially during night flight. Jet lag has three major components; including external de synchronization, internal desynchronization, and sleep loss. Although external de synchronization is the major culprit, it is not at all uncommon for travelers to experience difficulty falling asleep or remaining asleep because of gastrointestinal distress, uncooperative bladders, or nagging headaches. Such unwanted intrusions most likely to reflect the general influence of internal desynchronization. From the free-running subjects, the data has revealed that sleep tendency, sleepiness, the spontaneous duration of sleep, and REM sleep propensity, each varied markedly with the endogenous circadian phase of the temperature cycle, despite the facts that the average period of the sleep-wake cycle is different from that of the temperature cycle under these conditions. However, whereas the first ocurrence of slow wave sleep is usually associated with a fall in temperature, the amount of SWS is determined primarily by the length of prior wakefulness and not by circadian phase. Another factor to be considered for flight in either direction is the amount of prior sleep loss or time awake. An increase in sleep loss or time awake would be expected to reduce initial sleep latency and enhance the amount of SWS. By combining what we now know about the circadian characteristics of sleep and homeostatic process, many of the diverse findings about sleep after transmeridian flight can be explained. The severity of jet lag is directly related to two major variables that determine the reaction of the circadian system to any transmeridian flight, eg., the direction of flight, and the number of time zones crossed. Remaining factor is individual differences in resynchmization. After a long flight, the circadian timing system and homeostatic process can combine with each other to produce a considerable reduction in well-being. The author suggested that by being exposed to local zeit-gebers and by being awake sufficient to get sleep until the night, sleep improves rapidly with resynchronization following time zone change.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.5
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• pp.258-270
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• 2014

In this paper, we investigate channel capacity of two kinds of uplink OFDMA (Orthogonal Frequency Division Multiple Access) schemes, i.e. ZCZ (Zero Correlation Zone) code time-spread OFDMA and sparse SC-FDMA (Single Carrier Frequency Division Mmultiple Access) robust to access timing offset (TO) among multiple users. In order to reflect the practical condition, we consider not only access TO among multiple users but also peak to average power ratio (PAPR) which is one of hot issues of uplink OFDMA. In the case with access TO among multiple users, the amplified signal of users by power control might affect a severe interference to signals of other users. Meanwhile, amplified signal by considering distance between user and base station might be distorted due to the limit of amplifier and thus the performance might degrade. In order to achieve the maximum channel capacity, we investigate the combinations of transmit power so called ASF (adaptive scaling factor) by numerical simulations. We check that the channel capacity of the case with ASF increases compared to the case with considering only distance i.e. ASF=1. From the simulation results, In the case of high signal to noise ratio (SNR), ZCZ code time-spread OFDMA achieves higher channel capacity compared to sparse block SC-FDMA. On the other hand, in the case of low SNR, the sparse block SC-FDMA achieves better performance compared to ZCZ time-spread OFDMA.