• The Journal of the Acoustical Society of Korea
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• v.23 no.1
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• pp.24-29
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• 2004

In ocean acoustic tomography (OAT), the pulse compression techniques using M-sequences are employed in the many studies for investigating the ocean structures. M-sequences can provide the good time and Doppler resolution in the process of demodulation using matched-filter. The signal-to-noise (SNR) performance at the output of receiver may be improved by manipulating received signal, i. e. coherently averaging. The processing time can be significantly reduced by using fast hadarmard transform (FHT) or fast Fourier transform (FFT). In this paper, we estimate the multipath arrival structures and delay times using the East Korean Sea experiment data and explore the compensation method for the detrimental effects on performance due to sampling rate error. We also analyze the characteristics of the ocean acoustic channels through scattering function, delay power profile, and time dispersions.

• Proceedings of the Korean Institute Of Construction Engineering and Management
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• autumn
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• pp.359-364
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• 2003

The loss of potential opportunity profit which is consisting in the partial markups of the corporation would taking placed in related with the time-delay deeply, has customarily disregarded in contract adjustment under the principles of denial of cost accounting method, declined conjecture in the point of benefits and protection of the law in scope of compensation and the restricted conditions of constant contract. It is being resulted from that the policies of the general principles of accounting standards which is subjected to ask an objective data and evidence, and the denial system as a debt derived from imperfect legal theory applied by current law. Therefore, it is necessitated to find if any irrationality in the positive system is and further to draw an improved reasonable measures to adopt by review of constant system preparing tile reasonableness with the method of suitable quantification devices provided that any time-delay is induced by the party.

• The Journal of the Acoustical Society of Korea
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• v.38 no.6
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• pp.630-636
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• 2019

Passive Ranging Sonar (PRS) is a type of passive sonar consisting of three sub-array on the port and starboard, and has a characteristic of detecting a target and calculating a bearing and a distance. The bearing and distance calculation requires physical sub-array position information, and the bearing and distance accuracy performance are deteriorated when the position information of the sub-array is inaccurate. In particular, it has a greater impact on distance accuracy performance using plus value of two time-delay than a bearing using average value of two time-delay. In order to improve this, a study on sub-array position error estimation and error compensation is needed. In this paper, We estimate the sub-array position error based on enetic algorithm, an optimization search technique, and propose a method to improve the performance of distance accuracy by compensating the time delay error caused by the position error. In addition, we will verify the proposed algorithm and its performance using the sea-going data.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.6
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• pp.1250-1259
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• 2012

In this paper, a time-domain comparator is proposed for a successive approximation (SA) analog-to-digital converter (ADC) with a low power and high resolution. The proposed time-domain comparator consists of a voltage-controlled delay converter with a clock feed-through compensation circuit, a time amplifier, and binary phase detector. It has a small input capacitance and compensates the clock feed-through noise. To analyze the performance of the proposed time-domain comparator, two 1V 10-bit 200-kS/s SA ADCs with a different time-domain comparator are implemented by using 0.18-${\mu}m$ 1-poly 6-metal CMOS process. The measured SNDR of the implemented SA ADC is 56.27 dB for the analog input signal of 11.1 kHz, and the clock feed-through compensation circuit and time amplifier of the proposed time-domain comparator enhance the SNDR of about 6 dB. The power consumption and area of the implemented SA ADC are 10.39 ${\mu}W$ and 0.126 mm2, respectively.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.6
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• pp.576-584
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• 2003

This paper presents a new control method of single-phase active power filter(APF) for the compensation of harmonic current components in nonlinear loads. Constructing a imaginary second-phase giving time delay to load currents, making single-phase system into the system that has two phases, complex calculation is possible. In the previous method, it made a imaginary-phase lagged to the load current T/4(here T is the fundamental cycle), but in proposed method, the new signal, which has the delayed phase through the filter, using the phase-delay property of low-pass filter, was used to the second phase. Instantaneous calculation of harmonic current is possible, because two phase have different phase. In this paper, it was done with instantaneous calculation using the rotating reference frames(RRF) that synchronizes with source-frequency, a reference of compensation currents, not applying to instantaneous reactive power theory which uses the existed fixed reference frames. The simulation and experiment about R-L loads using the current source were carried out, and the effect of the proposed method was preyed through the result of this experiment.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.1
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• pp.50-55
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• 2021

Multi-path system is a system in which utilizes various networks simultaneously. It is expected that multi-path system can enhance communication speed, reliability, security of network. In this paper, we focus on path selection in multi-path system. To select optimal path, we propose deep reinforcement learning algorithm which is rewarded by the round-trip-time (RTT) of each networks. Unlike multi-armed bandit model, deep Q learning is applied to consider rapidly changing situations. Due to the delay of RTT data, we also suggest compensation algorithm of the delayed reward. Moreover, we implement testbed learning server to evaluate the performance of proposed algorithm. The learning server contains distributed database and tensorflow module to efficiently operate deep learning algorithm. By means of simulation, we showed that the proposed algorithm has better performance than lowest RTT about 20%.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.274-277
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• 1999

The paper describes a implementation of space vector pulse-width modulation (SVPWM) voltage source inverter using Field Programmable Gate Array(FPGA) for a induction motor control system. The implemented chip is included logic circuits for SVPWM, dead time compensation and speed detection using Quick Logic, QL16X24B. The maximum operating frequency and delay time can be set to 110MHz and 6 nsec. The designed FPGA for SVPWM can be incorporated with a digital signal processing to provide a simple and effective solution for high performance voltage source inverter drives. Simulation and Implementation results are shown to verify the usefulness of FPGA as a Application Specific Integrated Circuit(ASIC) in power electronics applications

• Proceedings of the Acoustical Society of Korea Conference
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• spring
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• pp.149-152
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• 1999

This paper addresses major issues in localising sound sources in space using the experimental data set of head-related responses in the time or frequency domain. They come from the technical realisation steps for implementing the convolution of HRIR's with sound sources, the cross-talk cancellation for transaural filtering, the matched time delay compensation, etc. in real, those technical matters seem to be minor because they can be realised in off-line signal processing schemes. This paper puts much emphasis on what we misunderstood about the sets of HRTF's or HRIR's, More specifcaily, the sets of HRTF's or HRIR's of course supply relevant information to sound localisation but include much useless 'rubbish' that have made for us to fail to put spatial image into real souno signals such as voices and music's. This paper proposes possible reasons for such failure and, furthermore, introduces detained subjects that should be challenged so as to resolve them.

• Journal of the Korean Society of Industry Convergence
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• v.2 no.2
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• pp.103-108
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• 1999

The paper describes a implementation of space vector pulse-width modulation voltage source inverter and interfacing of DSP using field programmable gate array(FPGA) for a induction motor vector control system. The implemented chip is included logic circuits for SVPWM, dead time compensation and speed detection using Quick Logic, QLl6X24B. The maximum operating frequency and delay time can be set to 110MHz and 6 nsec. The designed Application Specific Integrated Circuit(ASIC) for SVPWM can be incorporated with a digital signal processing to provide a simple and effective solution for high performance induction motor drives with a voltage source inverter. Simulation and implementation results are shown to verify the usefulness of ASIC in a motor drive system and power electronics applications.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.1
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• pp.30-35
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• 2008

In this paper, the application of power Quality monitoring based on Sampled Value(SV) which is introduced in the IEC61850 International Standard for substation communication are discussed. Firstly, while Merging Unit(MU) is designed as a process level device transmitting sensor data, the practical problems such as time delay compensation and optical fiber communication are encountered. Secondly, the Sampled Value message which is proper to a power quality monitoring system is presented. Because the power quality monitoring system requests less time-critical service compared to protection and control applications, the Sampled Value service message structure is introduced to improve efficiency. Lastly, the power quality monitoring server having various power quality analysis functions is suggested to verify the performance of Merging Unit With the diverse experiments, it is proved that the process bus distributed solution is flexible and economic for the power quality monitoring.