• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.7A
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• pp.623-631
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• 2010

In this paper, various of pilot-assisted channel estimation techniques for 3GPP LTE downlink are tested under multipath Rayleigh fading channel. At first, the conventional channel estimation techniques are applied with linear zero-forcing (ZF) equalizer, such as one dimensional least square (1-D LS) linear interpolation, two dimensional (2-D) wiener filter, the time and frequency dimension separate wiener filter and maximum likelihood estimator (MLE). Considering the practical implementation, we proposed two channel estimation techniques by combining time-dimension wiener filter and MLE in two manners, which showed a good tradeoff between system performance and complexity when comparing with conventional techniques. The nonlinear decision feedback equalizer (DFE) which can show a better performance than linear ZF equalizer is also implemented for mitigating inter-carrier interference (ICI) in our system. The complexity of these algorithms are calculated in terms of the number of complex multiplications (CMs) and the performances are evaluated by showing the bit error rate (BER).

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.7
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• pp.48-55
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• 2012

Because of increasing complexity in maximum-likelihood (ML) decoding of four of higher antenna scenario, Partial Interference Cancellation (PIC) group decoding could be the perfect solution to reduce the decoding complexity occurs in ML decoding. In this paper, we separate the symbols the users in the layered basis and find the equivalent channel matrix. Based on the equivalent channel matrix we provide the grouping scheme. In our paper, we construct a block wise transmission technique which will achieve the desired code rate and reduce the complexity and provide less transmission time. Finally we show the different grouping performance.

• Journal of the Korea Society of Computer and Information
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• v.25 no.2
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• pp.41-48
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• 2020

In this paper, we derive a common computational part in an algorithm that can simultaneously perform multiplication and square over finite fields, and propose a low-area bit-parallel systolic array that reduces hardware through sequential processing. The proposed systolic array has less space and area-time (AT) complexity than the existing related arrays. In detail, the proposed systolic array saves about 48% and 44% of Choi-Lee and Kim-Kim's systolic arrays in terms of area complexity, and about 74% and 44% in AT complexity. Therefore, the proposed systolic array is suitable for VLSI implementation and can be applied as a basic component in hardware constrained environment such as IoT.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.7
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• pp.3433-3446
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• 2019

Aiming at the high complexity of traditional single-channel demodulation algorithm for PCMA signals, a new demodulation algorithm based on neural network is proposed to reduce the complexity of demodulation in the system of non-cooperative PCMA communication. The demodulation network is trained in this paper, which combines the preprocessing module and decision module. Firstly, the preprocessing module is used to estimate the initial parameters, and the auxiliary signals are obtained by using the information of frequency offset estimation. Then, the time-frequency characteristic data of auxiliary signals are obtained, which is taken as the input data of the neural network to be trained. Finally, the decision module is used to output the demodulated bit sequence. Compared with traditional single-channel demodulation algorithms, the proposed algorithm does not need to go through all the possible values of transmit symbol pairs, which greatly reduces the complexity of demodulation. The simulation results show that the trained neural network can greatly extract the time-frequency characteristics of PCMA signals. The performance of the proposed algorithm is similar to that of PSP algorithm, but the complexity of demodulation can be greatly reduced through the proposed algorithm.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.19 no.2
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• pp.39-48
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• 2009

In this paper we improve previous related-key rectangle attacks on AES from 9 rounds to 10 rounds: Our attacks break the first 10 rounds of 12-round AES-192 with 256 related keys, a data complexity of $2^{124}$ and a time complexity of $2^{183}$, and also break the first 10 rounds of 12-round AES-192 with 64 related keys, a data complexity of $2^{122}$ and a time complexity of $2^{183.6}$, Our attacks are the best knoown attacks on AES-192.

• Journal of KIISE:Software and Applications
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• v.33 no.10
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• pp.823-835
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• 2006

Multimedia is a very popular service in the Internet. But, we cannot provide multimedia service at a uniform content, because networks and devices are various. Thus, an adaptive service is needed for multimedia transmission. Video Transcoding is the good solution that can service multimedia adaptively. This paper proposes the streaming system that is composed of encoder, transcoder, decoder The encoder enhanced time complexity and PSNR in case of transcoding using PP(Prediction Period). The decoder is almost same as the traditional media player. Transcoder reduced time complexity through combination of prediction period in encoder and skipping period to control frame rate in transcoder. In simulation results, the performances of proposed scheme outperform the system with traditional transcoder in time complexity and PSNR.

• Journal of the Korea Society of Computer and Information
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• v.28 no.2
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• pp.69-75
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• 2023

Finite field arithmetic operations play an important role in a variety of applications, including modern cryptography and error correction codes. In this paper, we propose an efficient multiplication algorithm over finite fields using the Montgomery multiplication algorithm. Existing multipliers can be implemented using AND and XOR gates, but in order to reduce time and space complexity, we propose an algorithm using NAND and NOR gates. Also, based on the proposed algorithm, an efficient semi-systolic finite field multiplier with low space and low latency is proposed. The proposed multiplier has a lower area-time complexity than the existing multipliers. Compared to existing structures, the proposed multiplier over finite fields reduces space-time complexity by about 71%, 66%, and 33% compared to the multipliers of Chiou et al., Huang et al., and Kim-Jeon. As a result, our multiplier is proper for VLSI and can be successfully implemented as an essential module for various applications.

• IEMEK Journal of Embedded Systems and Applications
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• v.13 no.1
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• pp.1-8
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• 2018

This paper proposes a low complexity super resolution algorithm for frequency modulated continuous wave (FMCW) radar systems for foreign object debris (FOD) detection. FOD radar has a requirement to detect foreign object in small units in a large area. However, The fast Fourier transform (FFT) method, which is most widely used in FMCW radar, has a disadvantage in that it can not distinguish between adjacent targets. Super resolution algorithms have a significantly higher resolution compared with the detection algorithm based on FFT. However, in the case of the large number of samples, the computational complexity of the super resolution algorithms is drastically high and thus super resolution algorithms are difficult to apply to real time systems. In order to overcome this disadvantage of super resolution algorithm, first, the proposed algorithm coarsely obtains the frequency of the beat signal by employing FFT. Instead of using all the samples of the beat signal, the number of samples is adjusted according to the frequency of the beat signal. By doing so, the proposed algorithm significantly reduces the computational complexity of multiple signal classifier (MUSIC) algorithm. Simulation results show that the proposed method achieves accurate location even though it has considerably lower complexity than the conventional super resolution algorithms.

• Journal of The Korea Institute of Healthcare Architecture
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• v.11 no.1
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• pp.15-22
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• 2005

Healthcare design has been considered as one of the most complex design types. In this study, healthcare design complexity is analysed by the following categories: (1) function; (2) medical technology; (3) scientific knowledge; (4) aesthetics; and (5) interest group complexity. The central questions here are: (1) What is the impact of specialized knowledge on the professional practice; and (2) What are the relationships between design complexity and specialized knowledge. To answer these questions, this study utilizes two approaches, including mail-out questionnaires survey and in-person and focus group interviews. This study found that healthcare design architects emphasize the technical component of specialized healthcare design knowledge. Thus they perceive that architectural research, as a tool to increase specialized healthcare design knowledge, is beneficial to solve the technical components including medical technology and functional problems. In the professional practice, however, architectural research is hardly conducted due mainly to the lack of money and time for it. Different perceptions regarding healthcare design complexity and architectural research among the firms exist, depending on the firm size. These results imply that the knowledge management strategy of large firms can be more efficient to the organizational growth than the small firms.

• ETRI Journal
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• v.25 no.6
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• pp.475-488
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• 2003

In this paper, we propose an efficient and simple fair queuing algorithm, called new starting potential fair queuing (NSPFQ), which has O(1) complexity for virtual time computation and also has good delay and fairness properties. NSPFQ introduces a simpler virtual time recalibration method as it follows a rate-proportional property. The NSPFQ algorithm recalibrates the system virtual time to the minimum virtual start time among all possible virtual start times for head-of-line packets in backlogged sessions. Through analysis and simulation, we show that the proposed algorithm has good delay and fairness properties. We also propose a hardware implementation framework for the scheduling algorithm.