• 공업화학
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• 제20권4호
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• pp.402-406
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• 2009

상압플라즈마 공정을 이용하여 $TiO_2$ 박막의 표면을 개질하고 광촉매 활성을 평가하였다. $TiO_2$ 박막은 $TiO_2$ 졸-겔 용액에서 유리판에 dip-coating법으로 코팅한 후 소성 온도와 소성 시간을 변화시켜 가면서 제조하였다. 표면 개질에 사용된 플라즈마는 질소 플라즈마였으며, 방전전력, 처리시간 등의 공정변수를 변화시키면서 실험을 수행하였다. 광촉매 활성은 UV-A와 형광등 하에서의 메틸렌 블루 분해효율을 바탕으로 평가하였다. XPS 분석 결과, 박막의 표면에 소량의 질소가 도핑되었음을 알 수 있었으며, 광촉매 효율은 UV-A와 형광등 하에서 모두 증가하였고, 특히 형광등 하에서 좀 더 증가하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.230-230
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• 2013

In amorphous or microcrystalline thin-film silicon solar cells, p-i-n structure is used instead of p/n junction structure as in wafer-based Si solar cells. Hence, these p-i-n structured solar cells inevitably consist of many interfaces and the cell efficiency critically depends on the effective control of these interfaces. In this study, in-situ plasma treatment process of the interfaces was developed to improve the efficiency of a-Si:H solar cell. The p-i-n cell was deposited using a single-chamber VHF-PECVD system, which was driven by a pulsed-RF generator at 80 MHz. In order to solve the cross-contamination problem of p-i layer, high RF power was applied without supplying SiH4 gas after p-layer deposition, which effectively cleaned B contamination inside chamber wall from p-layer deposition. In addition to the p-i interface control, various interface control techniques such as thin layer of TiO2 deposition to prevent H2 plasma reduction of FTO layer, multiple applications of thin i-layer deposition and H2 plasma treatment, H2 plasma treatment of i-layer prior to n-layer deposition, etc. were developed. In order to reduce the reflection at the air-glass interface, anti-reflective SiO2 coating was also adopted. The initial solar cell efficiency over 11% could be achieved for test cell area of 0.2 $cm^2$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 춘계학술대회 논문집 유기절연재료 전자세라믹 방전플라즈마 일렉트렛트 및 응용기술
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• pp.93-96
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• 2002

In this study, PZT thin films were fabricated using sol-gel processing onto Si/$SiO_2$/Ti/Pt substrates. PZT sol with different Zr/Ti ratio(20/80, 30/70, 40/60, 52/48) were prepared, respectively. The films were fabricated by using the spin-coating method on substrates. The films were heat treated at $450^{\circ}C$, $650^{\circ}C$ by rapid thermal annealing(RTA). The preferred orientation of the PZT thin films were observed by X-ray diffraction(XRD), and Scanning electron microscopy(SEM). All of the resulting PZT thin films were crystallized with perovskite phase. The fine crystallinity of the films were fabricated. Also, we found that the ferroelectric properties from the dielectric constant of the PZT thin films were over 600 degrees, P-E hysteresis constant. And the leakage current densities of films were lower than $10^{-8}A/cm^2$. It is concluded that the PZT thin films by sol-gel process to be convinced of application for ferroelectric memory device.

• 전기학회논문지
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• 제66권2호
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• pp.354-356
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• 2017

We focused on light management technology in amorphous silicon solar cells to suppress increase in absorber thickness for improving power conversion efficiency (PCE). $MgF_2$ and $TiO_2$ anti-reflection layers were coated on both sides of Asahi VU ($glass/SnO_2:F$) substrates, which contributed to increase in PCE from 9.16% to 9.81% at absorber thickness of only 150 nm. Also, we applied very thin $MgF_2$ as a rear reflector at n-type nanocrystalline silicon oxide/Ag interface to boost photocurrent. By reinforcing rear reflection, we could find the PCE increase from 10.08% up to 10.34% based on thin absorber about 200 nm.

• 한국세라믹학회지
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• 제40권1호
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• pp.46-51
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• 2003

Liquid delivery MOCVD 공정으로 200nm 정도의 두께를 가진 강유전성 S $r_{0.7}$B $i_{2.1}$T $a_{2.0}$ $O_{9}$ 박막을 Pt/Ti/ $SiO_2$/Si 기판 위에 증착하였다. 본 실험에서는 Sr(TMHD)$_2$.pmdeta, Bi(ph)$_3$ 그리고 Ta( $O^{i}$ Pr)$_4$(TMHD)를 출발 물질로 사용하였으며 n-butyl acetate와 pentamethyldiethylenetriamine를 용매로 사용하였다. 이 실험의 기판 온도와 압력 조건은 각각 57$0^{\circ}C$와 5 Torr였다. 78$0^{\circ}C$에서 열처리한 SBT 박막의 3V와 5V 인가 전압하에서의 잔류분극값은 각각 7.247 $\mu$C/$\textrm{cm}^2$와 8.485 $\mu$C/$\textrm{cm}^2$이었다.다.다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제1권4호
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• pp.202-208
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• 2001

In Recent results suggested that doping $Ta_2O_5$ with a small amount of $TiO_2$ using standard ceramic processing techniques can increase the dielectric constant of $Ta_2O_5$ significantly. In this paper, this concept is studied using RTCVD (Rapid Thermal Chemical Vapor Deposition). Ti-doped $Ta_2O_5$ films are deposited using $TaC_{12}H_{30}O_5N$, $C_8H_{24}N_4Ti$, and $O_2$ on both Si and $NH_3$-nitrided Si substrates. An $NH_3$-based interface layer at the Si surface is used to prevent interfacial oxidation during the CVD process and post deposition annealing is performed in $H_2/O_2$ ambient to improve film quality and reduce leakage current. A sputtered TiN layer is used as a diffusion barrier between the Al gate electrode and the $TaTi_xO_y$ dielectric. XPS analyses confirm the formation of a ($Ta_2O_5)_{1-x}(TiO_2)_x$ composite oxide. A high quality $TaTi_xO_y$ gate stack with EOT (Equivalent Oxide Thickness) of $7{\AA}$ and leakage current $Jg=O.5A/textrm{cm}^2$ @ Vg=-1.0V has been achieved. We have also succeeded in forming a $TaTi_x/O_y$ composite oxide by rapid thermal oxidation of the as-deposited CVD TaTi films. The electrical properties and Jg-EOT characteristics of these composite oxides are remarkably similar to that of RTCVD $Ta_2O_5, suggesting that the dielectric constant of $Ta_2O_5$ is not affected by the addition of $TiO_2$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.44-44
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• 2009

Recently, transparent ZnO-based TFTs have attracted much attention for flexible displays because they can be fabricated on plastic substrates at low temperature. We report the fabrication and characteristics of ZnO channel layers(ZnO TFTs) having different channel thicknesses. The ZnO film were deposited as active channel layers on $Si_3N_4/Ti/SiO_2p$-Si substrates by rf magnetron sputtering at $100\;^{\circ}C$ without additional annealing. Also the Zno thin films deposited at oxygen partial pressures of 40%. ZnO TFTs using a bottom-gate configuration were investigated. The $Si_3N_4$ film were deposited as gate insulator by PE-CVD at $15\;^{\circ}C$. All Processes were processed below $150^{\circ}C$ which is optimal temperature for flexible display and were used dry etching method.

• 대한화학회지
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• 제37권6호
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• pp.549-554
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• 1993

티타늄 금속판을 공기산화와 수증기 산화하여 만든 Ti$O_{2-x}$ 박막을 시료로 사용하여 1M NaOH 용액에서 광전기화학적 성질을 연구하였다. 높은 온도에서 제조된 Ti$O_{2-x}$ 전극들은 낮은 온도에서 제조된 전극들보다 더 음의 값으로 주어지는 flat band potential($V_{fb}$)과 더 높은 donor density($N_D$)를 가졌다. 전극전위의 변화에 따른 광전류 측정과 Mott-Schottky plot로부터 얻은 $V_{fb}$는 -0.95 ∼ -1.1 V 사이에서 비슷한 값으로 주어졌다. 자외부 영역의 광을 완전히 차단하는 TiO2 단결정을 필터로 하여 가시부 영역의 광전류를 측정할 때 분해능이 좋은 slit를 사용한 경우 좋은 sub band gap 광반응을 볼 수 있었다.

• 대한전자공학회논문지SD
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• 제37권11호
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• pp.50-58
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• 2000

Goodved $SiO_2$ 박막을 갖는 Mach-Zehnder(M-Z)형태의 $Ti:LiNbO_3$ 진행파 광변조기의 전극구조를 변화시켜가며 유한요소법에 의한 해석을 수행하였다. 최적의 설계치를 추출하였으며, 제작된 전극에 대하여 특성임피던스($Z_o$), 마이크로파 유효굴절률($N_{eff}$), 감쇠정수($a_o$)를 측정하여 그 결과를 이론치와 비교하였다. 전극두께가 11${\mu}m$이고, $SiO_2$ 완중박막을 식각한 전극에 대하여, RF 측정결과로부터 계산된 3dB 변조대역폭은 18GHz로 나타났다.

• Journal of information and communication convergence engineering
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• 제2권2호
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• pp.93-96
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• 2004

The a-Si:H TFT using ferroelectric of $SrTiO_3$ as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$ and $Si_{3}N_{4}$. Ferroelectric increases on-current, decreases threshold voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, retractive index of 1.8∼2.0 and resistivity of $10^{13}$~$10^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60∼100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8∼20 $\mu\textrm{m}$ and channel width of 80∼200 $\mu\textrm{m}$. And it shows that drain current is 3.4$\mu\textrm{A}$ at 20 gate voltage, $I_{on}$/$I_{off}$ is a ratio of $10^5$~$10^8$ and $V_{th}$ is 4∼5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $\mu\textrm{A}$ at 20 gate voltage and $V_{th}$ is 5∼6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.