• Journal of the Korean Society for Precision Engineering
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• v.26 no.12
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• pp.23-31
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• 2009

• Journal of the Korean Society for Precision Engineering
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• v.26 no.12
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• pp.32-40
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• 2009

• Journal of the Korean Society for Precision Engineering
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• v.26 no.12
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• pp.41-46
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• 2009

• Journal of the Microelectronics and Packaging Society
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• v.16 no.1
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• pp.45-50
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• 2009

By Laser Through-Silicon-Via process, debris and particles occur when you are forming. Therefore the research of TSV cleaning become important to remove those particles and debris. Both chemical cleaning method that uses a surfactant and physical cleaning method that uses a brush were studied with the via of $30{\mu}m$ diameter and $100{\mu}m$ depth on the 8 inch CMOS Image Sensor wafer. On the DI water and a surfactant in mixture ratio of 2:1, debris show $73{\mu}m^2$ per $0.054mm^2$. Cleaning is superior by lower mixture ratio of DI water and surfactant. In addition, It is less than 5% of debris distribution in the laser condition changed by Laser's frequency and its speed and cleaning had no effect. In the physical cleaning, there are no crack and damage when the system condition is set by $1000{\sim}3000rpm$ strip, $50{\sim}3000rpm$ rinsing, and $200{\sim}300rpm$ brushing Therefore, debris and particles can be removed by enforced chemical method and physical method.

• Journal of Radiation Protection and Research
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• v.43 no.4
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• pp.154-159
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• 2018

Background: To prevent small leakage accidents, a real-time and direct detection system for small leaks with a detection limit below that of existing systems, e.g. $0.5gpm{\cdot}hr^{-1}$, is required. In this study, a small-size beta detector, which can be installed inside the reactor containment (CT) building and detect small leaks directly, was suggested and its feasibility was evaluated using MCNPX simulation. Materials and Methods: A target nuclide was selected through analysis of radiation from radionuclides in the reactor coolant system (RCS) and the spectrum was obtained via a silicon detector simulated in MCNPX. A window was designed to reduce the background signal caused by other nuclides. The sensitivity of the detector was also estimated, and its shielding designed for installation inside the reactor CT. Results and Discussion: The beta and gamma spectrum of the silicon detector showed a negligible gamma signal but it also contained an undesired peak at 0.22 MeV due to other nuclides, not the $^{16}N$ target nuclide. Window to remove the peak was derived as 0.4 mm for beryllium. The sensitivity of silicon beta detector with a beryllium window of 1.7 mm thickness was derived as $5.172{\times}10^{-6}{\mu}Ci{\cdot}cc^{-1}$. In addition, the specification of the shielding was evaluated through simulations, and the results showed that the integrity of the silicon detector can be maintained with lead shielding of 3 cm (<15 kg). This is a very small amount compared to the specifications of the lead shielding (600 kg) required for installation of $^{16}N$ gamma detector in inside reactor CT, it was determined that beta detector would have a distinct advantage in terms of miniaturization. Conclusion: The feasibility of the beta detector was evaluated for installation inside the reactor CT to detect small leaks below $0.5gpm{\cdot}hr^{-1}$. In future, the design will be optimized on specific data.

• Journal of Sensor Science and Technology
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• v.22 no.1
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• pp.89-94
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• 2013

In this paper, we developed a beam of MEMS probe card using a BeCu sheet. Silicon wafer thickness of $400{\mu}m$ was fabricated by using deep reactive ion etching (RIE) process. After forming through silicon via (TSV), the silicon wafer was bonded with BeCu sheet by soldering process. We made BeCu beam stress-free owing to removing internal stress by using joule heating. BeCu beam was fused by using joule heating caused by high current. The fabricated BeCu beam measured length of 1.75 mm and width of 0.44 mm, and thickness of $15{\mu}m$. We measured fusing current as a function of the cutting planes. Maximum current was 5.98 A at cutting plane of $150{\mu}m^2$. The proposed low-cost and simple fabrication process is applicable for producing MEMS probe beam.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.39 no.7
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• pp.653-657
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• 2015

A numerical investigation to simulate the selective growth of silicon-germanium quantum-dots via local surface diffusivity enhancement is presented. A nonlinear equation for the waviness evolution of film surface is derived to consider the effects of spatially-varying diffusivity, influenced by a surface temperature profile. Results show that the morphology of the initially planar film shapes into an undulated surface upon perturbation, and a steady-state solution describes a fully grown quantum-dot. The present study points toward a fabrication technique that can obtain selectivity for self-assembly.

• International Journal of Quality Innovation
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• v.7 no.2
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• pp.141-156
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• 2006

This study describes a novel algorithm for optimizing the quality yield of silicon wafer slicing. 12 inch wafer slicing is the most difficult in terms of semiconductor manufacturing yield. As silicon wafer slicing directly impacts production costs, semiconductor manufacturers are especially concerned with increasing and maintaining the yield, as well as identifying why yields decline. The criteria for establishing the proposed algorithm are derived from a literature review and interviews with a group of experts in semiconductor manufacturing. The modified Delphi method is then adopted to analyze those results. The proposed algorithm also incorporates the analytic hierarchy process (AHP) to determine the weights of evaluation. Additionally, the proposed algorithm can select the evaluation outcomes to identify the worst machine of precision. Finally, results of the exponential weighted moving average (EWMA) control chart demonstrate the feasibility of the proposed AHP-based algorithm in effectively selecting the evaluation outcomes and evaluating the precision of the worst performing machines. So, through collect data (the quality and quantity) to judge the result by AHP, it is the key to help the engineer can find out the manufacturing process yield quickly effectively.

• Laser Solutions
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• v.14 no.4
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• pp.14-20
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• 2011

The advantage of using lasers for through silicon via (TSV) drilling is that they allow higher flexibility during manufacturing because vacuums, lithography, and masks are not required; furthermore, the lasers can be applied to metal and dielectric layers other than silicon. However, conventional nanosecond lasers have disadvantages including that they can cause heat affection around the target area. In contrast, the use of a picosecond laser enables the precise generation of TSVs with a smaller heat affected zone. In this study, a comparison of the thermal and crystallographic defect around laser-drilled holes when using a picosecond laser beam with varing a fluence and repetition rate was conducted. Notably, the higher fluence and repetition rate picosecond laser process increased the experimentally recast layer, surface debris, and dislocation around the hole better than the high fluence and repetition rate. These findings suggest that even the picosecond laser has a heat accumulation effect under high fluence and short pulse interval conditions. To eliminate these defects under the high speed process, the CDE (chemical downstream etching) process was employed and it can prove the possibility to applicate to the TSV industry.

• Korean Journal of Metals and Materials
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• v.49 no.5
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• pp.388-394
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• 2011

High speed copper filling into TSV (through-silicon-via) for three dimensional stacking of Si chips was investigated. For this study, a tapered via was prepared on a Si wafer by the DRIE (deep reactive ion etching) process. The via had a diameter of 37${\mu}m$ at the via opening, and 32${\mu}m$ at the via bottom, respectively and a depth of 70${\mu}m$. $SiO_2$, Ti, and Au layers were coated as functional layers on the via wall. In order to increase the filling ratio of Cu into the via, a PPR (periodic pulse reverse) wave current was applied to the Si chip during electroplating, and a PR (pulse reverse) wave current was applied for comparison. After Cu filling, the cross sections of the vias was observed by FE-SEM (field emission scanning electron microscopy). The experimental results show that the tapered via was filled to 100% at -5.85 mA/$cm^2$ for 60 min of plating by PPR wave current. The filling ratio into the tapered via by the PPR current was 2.5 times higher than that of a straight via by PR current. The tapered via by the PPR electroplating process was confirmed to be effective to fill the TSV in a short time.