• 제목/요약/키워드: Three-level converters

검색결과 79건 처리시간 0.041초

DC-Link Voltage Balance Control Using Fourth-Phase for 3-Phase 3-Level NPC PWM Converters with Common-Mode Voltage Reduction Technique

  • Jung, Jun-Hyung;Park, Jung-Hoon;Kim, Jang-Mok;Son, Yung-Deug
    • Journal of Power Electronics
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    • 제19권1호
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    • pp.108-118
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    • 2019
  • This paper proposes a DC-link voltage balance controller using the fourth-phase of a three-level neutral-point clamped (NPC) PWM converter with medium vector selection (MVS) PWM for common-mode voltage reduction. MVS PWM makes the voltage reference by synthesizing the voltage vectors that cannot generate common-mode voltage. This PWM method is effective for reducing the EMI noise emitted from converter systems. However, the DC-link voltage imbalance problem is caused by the use of limited voltage vectors. Therefore, in this paper, the effect of MVS PWM on the DC-link voltage of a three-level NPC converter is analyzed. Then a proportional-derivative (PD) controller for the DC-link voltage balance is designed from the DC-link modeling. In addition, feedforward compensation of the neutral point current is included in the proposed PD controller. The effectiveness of the proposed controller is verified by experimental results.

단상 PWM 컨버터에 적용한 공간 벡터 PWM (Adaptation of Space Vector Modulation to Single-Phase High Power PWM Converters)

  • 이희면;이동명
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2011년도 전력전자학술대회
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    • pp.442-443
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    • 2011
  • In this paper, a voltage control method based on DQ transformation and Space Vector Pulse Width Modulation (SVPWM) for a single phase three-level converter is proposed. This control method is designed to use DC values instead of using instantaneous values of current which are usually used in single-phase application, so that it results in a fast and robust voltage control response. Simulation results demonstrate the validity of the control strategies.

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Minimization of DC-Link Capacitance for NPC Three-level PWM Converters

  • Alemi, Payam;Lee, Dong-Choon
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2011년도 전력전자학술대회
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    • pp.370-371
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    • 2011
  • This paper presents a control algorithm that minimizes the DC-link capacitance by decreasing the capacitor current. The capacitor current can be nullified by a feedback compensation term which is calculated from the power balance in the AC/DC converter. As a result, voltage variation in the DC-link is reduced further, which makes a large reduction in the size of DC-link capacitors which are expensive and have limitations in life time. Simulations are performed with two 80uF DC-link capacitors, which can be replaced by film capacitors.

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철도차량용 PWM 컨버터방식 비교 (The Comparison of PWM Converter's Topology in Electric Train)

  • 이현원;김남해
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1999년도 전력전자학술대회 논문집
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    • pp.97-100
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    • 1999
  • AC to DC single phase PWM converter for traction application requires rated high power and voltage. Therefor, series or parallel operation converters are necessary with considering the limitation of the power device specification. This paper compares the characteristic between two parallel operation of conventional PWM converter and Single phase three level converter about comparison of power circuit, cooling system control method and harmonic current by computer simulation.

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바이폴 HVDC 시스템의 EMTP 시뮬레이션 (EMTP Simulation of Bipolar HVDC System)

  • 곽주식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 C
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    • pp.1053-1055
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    • 1998
  • Using EMTP model which describes bipolar HVDC system, switching level simulation results are presented in this paper. Voltage synchronization at point of common coupling, gate pulse generation and current control loops are represented in TACS module. The system consists of 100 km submarine cable rated 300 MW and 12 pulse rectifier and inverter stations which are connected to equivalent three-phase sources and loads through the 154 kV AC lines, respectively. In convertor stations, harmonic filters and capacitor banks are equipped to cancel out the harmonics generated by converters and to supply the required reactive power.

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Implementation of a High Efficiency Grid-Tied Multi-Level Photovoltaic Power Conditioning System Using Phase Shifted H-Bridge Modules

  • Lee, Jong-Pil;Min, Byung-Duk;Yoo, Dong-Wook
    • Journal of Power Electronics
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    • 제13권2호
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    • pp.296-303
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    • 2013
  • This paper proposes a high efficiency three-phase cascaded phase shifted H-bridge multi-level inverter without DC/DC converters for grid-tied multi string photovoltaic (PV) applications. The cascaded H-bridge topology is suitable for PV applications since each PV module can act as a separate DC source for each cascaded H-bridge module. The proposed phase shifted H-bridge multi-level topology offers advantages such as operation at a lower switching frequency and a lower current ripple when compared to conventional two level topologies. It is also shown that low ripple sinusoidal current waveforms are generated with a unity power factor. The control algorithm permits the independent control of each DC link voltage with a maximum power point for each string of PV modules. The use of the controller area network (CAN) communication protocol for H-bridge multi-level inverters, along with localized PWM generation and PV voltage regulation are implemented. It is also shown that the expansion and modularization capabilities of the H-bridge modules are improved since the individual inverter modules operate more independently. The proposed topology is implemented for a three phase 240kW multi-level PV power conditioning system (PCS) which has 40kW H-bridge modules. The experimental results show that the proposed topology has good performance.

병렬입력/직렬출력(PISO) 부스트 컨버터의 출력 전압 밸런싱 특성 해석 (Analysis of Parallel-Input Series-Output(PISO) Boost Converter With Output Voltage Balancing Characteristic)

  • 남현택;차헌녕;김흥근
    • 전력전자학회논문지
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    • 제23권1호
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    • pp.40-46
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    • 2018
  • In this study, the output voltage balancing characteristics of parallel-input series-output (PISO) boost converter is analyzed. The PISO boost converter is derived by combining two basic boost converters. In comparison with the conventional three-level boost converter, the PISO boost converter can balance the output voltages under an unbalanced load condition without requiring additional circuit components and control strategy. A 2 kW prototype converter is built and tested to verify the output voltage balancing characteristics of the PISO boost converter.

EV와 NEV 겸용 50kW급 고효율 모듈형 급속충전기 개발 (Development of 50kW High Efficiency Modular Fast Charger for Both EV and NEV)

  • 김민재;김연우;요스 프라보우;최세완
    • 전력전자학회논문지
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    • 제21권5호
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    • pp.373-380
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    • 2016
  • In this paper, a 50-kW high-efficiency modular fast charger for both electric vehicle (EV) and neighborhood electric vehicle (NEV) is proposed. The proposed fast charger consists of five 10-kW modules to achieve fault tolerance, ease of thermal management, and reduce component stress. Three-level topologies for both AC-DC and DC-DC converters are employed to use 600V MOSFET, resulting in ease of component selection and increase in switching frequency. The proposed three-level DC-DC converter with coupled inductor and its hybrid switching method can reduce the circulating current under wide output voltage range. A 50-kW prototype of the proposed fast charger was developed and tested to verify the validity of the proposed concept. Experimental results show that the proposed fast charger achieves a rated efficiency of 95.2% and a THD of less than 3%.

Dual-model Predictive Direct Power Control for Grid-connected Three-level Converter Systems

  • Hu, Bihua;Kang, Longyun;Feng, Teng;Wang, Shubiao;Cheng, Jiancai;Zhang, Zhi
    • Journal of Power Electronics
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    • 제18권5호
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    • pp.1448-1457
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    • 2018
  • Many researchers devote themselves to develop model-predictive direct power control (MPDPC) so as to accelerate the response speed of the grid-connected systems, but they are troubled its large computing amount. On the basis of MPDPC, dual MPDPC (DMPDPC) is presented in this paper. The proposed algorithm divides the conventional MPDPC into two steps. In the first step, the optimal sector is obtained, which contains the optimal switching state in three-level converters. In the second step, the optimal switching state in the selected sector is searched to trace reference active and reactive power and balance neutral point voltage. Simulation and experiment results show that the proposed algorithm not only decreases the computational amount remarkably but also improves the steady-state performance. The dynamic response of the DMPDPC is as fast as that of the MPDPC.

A Hybrid CBPWM Scheme for Single-Phase Three-Level Converters

  • Wang, Shunliang;Song, Wensheng;Feng, Xiaoyun;Ding, Rongjun
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.480-489
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    • 2016
  • A novel hybrid carrier-based pulse width modulation (CBPWM) scheme that combines unipolar and dipolar modulations is proposed for single-phase three-level rectifiers, which are widely applied in railway traction drive systems. The proposed CBPWM method can satisfy the volt-second balancing principle in the complete modulation index region through overmodulation compensation. The modulation scheme features two modulation modes: unipolar and dipolar. The operation range limits of these modulation modes can be modified by changing the separation coefficient. In comparison with the traditional unipolar CBPWM, the proposed hybrid CBPWM scheme can provide advantageous features, such as lower high-order harmonic distortion of the line current and better utilization of switching frequency. The separation coefficient value is optimized to achieve the maximum utilization of these advantages. The experimental results verify the feasibility and effectiveness of the proposed hybrid CBPWM scheme.