• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.129-134
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• 2004

The development of fabrication processes of polycrystalline-silicon-thin-film transistors (poly-Si TFTs) at low temperatures is reviewed. Rapid crystallization through laser-induced melt-regrowth has an advantage of formation of crystalline silicon films at a low thermal budget. Solid phase crystallization techniques have also been improved for low temperature processing. Passivation of $SiO_2$/Si interface and grain boundaries is important to achieve high carrier transport properties. Oxygen plasma and $H_2O$ vapor heat treatments are proposed for effective reduction of the density of defect states. TFTs with high performance is reported.

• Bulletin of the Korean Chemical Society
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• v.31 no.10
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• pp.2909-2912
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• 2010

Hydrogenated microcrystalline silicon (${\mu}c$-Si:H) thin film for solar cells is prepared by plasma-enhanced chemical vapor deposition and physical properties of the ${\mu}c$-Si:H p-layer has been investigated. With respect to stable efficiency, this film is expected to surpass the performance of conventional amorphous silicon based solar cells and very soon be a close competitor to other thin film photovoltaic materials. Silicon in various structural forms has a direct effect on the efficiency of solar cell devices with different electron mobility and photon conversion. A Raman microscope is adopted to study the degree of crystallinity of Si film by analyzing the integrated intensity peaks at 480, 510 and $520\;cm^{-1}$, which corresponds to the amorphous phase (a-Si:H), microcrystalline (${\mu}c$-Si:H) and large crystals (c-Si), respectively. The crystal volume fraction is calculated from the ratio of the crystalline and the amorphous phase. The results are compared with high-resolution transmission electron microscopy (HR-TEM) for the determination of crystallinity factor. Optical properties such as refractive index, extinction coefficient, and band gap are studied with reflectance spectra.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.333-336
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• 2006

High Pressure Annealing System was developed to improve the characteristics of low-temperature poly-silicon thin film transistors.. (TFTs). The high-pressure steam annealing was applied to the poly-silicon film made by rapid thermal annealing method. The carrier lifetime was investigated by Microwave detection of the Photo-Conductive Decay and the increase of carrier lifetime which indicates the reduction of the defect was observed by high-pressure steam annealing of 1MPa 600C 1hour.

• Journal of the Semiconductor & Display Technology
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• v.3 no.2
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• pp.17-21
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• 2004

Aluminum nitride(AlN) thin films were deposited on silicon substrate by reactive RF magnetron sputtering without substrate heating. We investigated the dependence of some properties for AlN thin film on sputtering conditions such as working pressure, $N_2$ concentration and RF power. XRD, Ellipsometer and AES has been measured to find out structural properties and preferred orientation of AlN thin films. Deposition rate of AlN thin film was increased with an increase of RF power and decreased with an increase of $N_2$ concentration. AES in-depth measurements showed that stoichiometry of Aluminium and Nitrogen elements were not affected by $N_2$ concentration. It has shown that low working pressure, low $N_2$ concentration and high RF power should be maintained to deposit AlN thin film with a high degree of (0002) preferred orientation.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.06a
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• pp.93-93
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• 1998

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1568-1570
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• 2009

Nanocrystalline silicon thin films were deposited using an internal-type inductively coupled plasma-chemical vapor deposition at room temperature by varying the bias power to the substrate and the structural characteristics of the deposited thin film were investigated. The result showed that the crystalline volume fraction was decreased with the increase of bias power. At the low bias power range of 0~60 W, the compress stress in the deposited thin film was in the range of -34 ~ -77 Mpa which is generally lower than the residual stress observed for the nanocrystalline silicon thin films deposited by capacitively coupled plasma.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.257.2-257.2
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• 2015

In this paper, we report on the 10.33% efficient thin film/bulk tandem solar cells with the top cell made of amorphous silicon thin film and p-type bulk crystalline silicon bottom cell. The tunneling junction layers were used the doped nanocrystalline Si layers. It has to allow an ohmic and low resistive connection. For player and n-layer, crystalline volume fraction is ~86%, ~88% and dark conductivity is $3.28{\times}10-2S/cm$, $3.03{\times}10-1S/cm$, respectively. Optimization of the tunneling junction results in fill factor of 66.16 % and open circuit voltage of 1.39 V. The open circuit voltage was closed to the sum of those of the sub-cells. This tandem structure could enable the effective development of a new concept of high-efficiency and low cost cells.

• Transactions on Electrical and Electronic Materials
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• v.14 no.1
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• pp.16-19
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• 2013

Frequency filters with various filtering wavelengths were used in the photoelectric characterization of hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) and the experimental results were described and analyzed in terms of the photon energy spectral characteristics calculated from the integration of the photon energy and the spectral intensity of transmitted backlight through the filters at each wavelength. From the comparison of the photocurrents and the calculated photon energy spectrums for the filtered ranges of wavelength, it was possible to conclude that the photocurrents are closely related to the photon energy spectrums of the backlight.

• Transactions on Electrical and Electronic Materials
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• v.11 no.6
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• pp.257-260
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• 2010

Zinc oxide (ZnO) bottom-contact thin-film transistors (TFTs) were prepared by the use of injector type atomic layer deposition. Two hybrid gate oxide systems of different polarity polymers with silicon oxide were examined with the aim of improving the properties of the transistors. The mobility and threshold voltage of a ZnO TFT with a poly(4-dimethylsilyl styrene) (Si-PS)/silicon oxide hybrid gate dielectric had values of 0.41 $cm^2/Vs$ and 24.4 V, and for polyimide/silicon oxide these values were 0.41 $cm^2/Vs$ and 24.4 V, respectively. The good hysteresis property was obtained with the dielectric of hydrophobicity. The solid output saturation behavior of ZnO TFTs was demonstrated with a $10^6$ on-off ratio.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1050-1053
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• 2002

In this paper, Amorphous silicon on glass substrate was recrystallized to poly-crystalline silicon by solid phase crystallization (SPC) technology. The active region of thin film transistor (TFT) was fabricated by amorphous silicon. The output and transfer characteristics of thin film transistor with lightly doped drain (LDD) structure was measured and analyzed. As a results, analyzed TFTs reliability with LDD's length by various kinds argument such as sub-threshold swing coefficient, mobility and threshold voltages were evaluated. Stress effects in TFT were able to improve to the characteristics of turn-on current and hot carrier effects by LDD's length variations.