• 제목/요약/키워드: Thin film transistors

검색결과 867건 처리시간 0.029초

Flexible, Transparent Thin-Film Transistors Fabricated by Ink-Jet Printing with Carbon Nanotube-Based Conducting Ink

  • Lee, Yeon-Ju;Lee, Woo-Suk;Jeong, Soo-Kyeong;Choi, Seok-Ju;Kim, Hye-Min;Chun, Jin-Young;Kim, Sung-Ho;Geckeler, Kurt E.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.920-922
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    • 2009
  • Flexible, transparent thin-film transistor with active layers composed of carbon nanotube-based conducting ink were fabricated on a plastic substrate by ink-jet printing. The properties of the formulated conducting ink containing carbon nanotubes, a conducting polymer, and additives were characterized and optimized. The conducting ink was applied to flexible thin-film transistors using ink-jet printing.

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Organic thin-film transistors and transistor diodes with transfer-printed Au electrodes

  • Cho, Hyun-Duck;Lee, Min-Jung;Yoon, Hyun-Sik;Char, Kook-Heon;Kim, Yeon-Sang;Lee, Chang-Hee
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1122-1124
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    • 2009
  • Organic thin-film transistors (OTFTs) were fabricated by using the transfer patterning method. In order to remove Au pattern easily, UV-curable polymer mold was surface treated. Au source/drain (S/D) pattern was transferred to insulator-coated substrate surface. Fabricated OTFTs were compared to OTFTs using vacuum-deposited Au S/D. Additionally, transistor diodes were characterized.

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Sol-Gel Processed InGaZnO Oxide Semiconductor Thin-Film Transistors for Printed Active-Matrix Displays

  • Kim, Yong-Hoon;Park, Sung-Kyu;Oh, Min-Suk;Kim, Kwang-Ho;Han, Jeong-In
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1002-1004
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    • 2009
  • Solution-processed indium-gallium-zinc-oxide thin-film transistors were fabricated by sol-gel method. By a combinatorial study of InGaZnO multi-component system, optimum molar ratio of In, Ga, and Zn has been selected. By adjusting the In:Ga:Zn molar ratio, TFTs with field-effect mobility of 0.5 ~ 1.5 $cm^2$/V-s, threshold voltage of -5 ~ 5 V, and subthreshold slope of 1.5 ~ 2.5 V/decade were achieved.

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Pentacene Thin-Film Transistors with Polyimide/$SiO_2$ Dual Gate Dielectric

  • Imahara, Hirokazu;Kim, Woo-Yeol;Oana, Yasuhisa;Majima, Yutaka
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.972-973
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    • 2007
  • Relationships between field effect mobility and grain size on pentacene thin-film transistors with $polyimide/SiO_2$ gate dielectrics have been studied. 6 kinds of polyimide were used as surface treatment gate dielectric layer. Grain size of the pentacene thin film were between 5 and $30\;{\mu}m$ and depended on the polyimide. The field effect mobility were also depended on the polyimide and the those values were from 0.027 to $0.69\;cm^2/(Vs)$. The field effect mobility tends to increase with increasing the grain size. Precursor type polyimide containing polyamic acid show better mobility of $0.69\;cm^2/(Vs)$ than soluble type polyimide. Bias stress characteristics in air are discussed in the basis of the grain size.

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Hysteresis Characteristics in Low Temperature Poly-Si Thin Film Transistors

  • Chung, Hoon-Ju;Kim, Dae-Hwan;Kim, Byeong-Koo
    • Journal of Information Display
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    • 제6권4호
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    • pp.6-10
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    • 2005
  • The dependence of hysteresis characteristics in low temperature poly-Si (LTPS) thin film transistors (TFTs) on the gate-source voltage (Vgs) or the drain-source voltage (Vds) bias is investigated and discussed. The hysteresis levels in both p-type and n-type LTPS TFTs are independent of Vds bias but increase as the sweep range of Vgs increases. It has been found that the hysteresis in both p-type and n-type LTPS TFTs originated from charge trapping and de-trapping in the channel region rather than at the source/drain edges.

두 단계 열처리에 의해 제작된 다결정 실리콘 박막트랜지스터의 전기적 특성의 분석 (Analysis of electrical properties of two-step annealed polycrystalline silicon thin film transistors)

  • 최권영;한민구;김용상
    • 대한전기학회논문지
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    • 제45권4호
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    • pp.568-573
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    • 1996
  • The amorphous silicon films deposited by low pressure chemical vapor deposition are crystallized by the various annealing techniques including low-temperature furnace annealing and two-step annealing. Two-step annealing is the combination of furnace annealing at 600 [.deg. C] for 24 h and the sequential furnace annealing at 950 [.deg. C] 1h or the excimer laser annealing. It s found that two-step annealings reduce the in-grain defects significantly without changing the grain boundary structure. The performance of the poly-Si thin film transistors (TFTs) produced by employing the tow-step annealing has been improved significantly compared with those of one-step annealing. (author). 13 refs., 6 figs., 1 tab.

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Effects of processing temperature and optical anisotropy of a polymeric insulator on organic thin-film transistors

  • Bae, Jin-Hyuk;Kim, Won-Ho;Na, Jun-Hee;Lee, Sin-Doo
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.1107-1110
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    • 2006
  • We investigate the effect of processing temperature of gate insulator and optical anisotropy on organic thin-film transistors (OTFTs). The insulator film which was processed lower temperature than solvent boiling temperature can lead more aligned pentacne molecules compare to higher processed insulator film. It finally gives rise to the big increase of carrier mobility in OTFTs, although there are little difference at the seriously affecting properties to device performance, for example roughness of gate insulator film.

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Effects of the Deposition Rate of Pentacene Film on the Electrical Characteristics of Organic Thin-film Transistors

  • Park, Jae-Hoon;Lee, Yong-Soo;Kang, Chang-Heon;Kim, Yeon-Ju;Choi, Jong-Sun
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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    • pp.649-652
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    • 2003
  • Organic thin-film transistors were fabricated using pentacene as an active electronic material. Device characteristics are improved with increasing the deposition rate of pentacene. It is observed that the deposition rate influences on the interface properties between pentacene and polystyrene, and the molecular ordering of pentacene film. In this paper, we report the effects of the deposition rate of pentacene film on the device performance.

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Investigation of long-term stability of pentacene thin-film transistors encapsulated with transparent $SnO_2$

  • Kim, Woo-Jin;Koo, Won-Hoe;Jo, Sung-Jin;Kim, Chang-Su;Baik, Hong-Koo
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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    • pp.1276-1279
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    • 2005
  • The long-term stability of pentacene thin-film transistors (TFTs) encapsulated with a transparent $SnO_2$ thin-film prepared by ion beam assisted deposition (IBAD) was investigated. With a buffer layer of thermally evaporated 100 nm $SnO_2$ film deposited prior to IBAD process, our encapsulated OTFTs sustained its initial field-effect mobility up to one month and then gradually degraded showing only 37% reduction compared to 90% reduction of non-encapsulated OTFTs after 100 days in air ambient. The encapsulated OTFTs also exhibited superior on/off current ratio of over $10^5$ to that of the unprotected devices $({\sim}10^4)$ which was reduced from ${\sim}10^6$ before aging. Therefore, the enhanced long-term stability of our encapsulated OTFTs should be attributed to well protection of permeation of $H_2O$ and $O_2$ into the devices by the IBAD $SnO_2$ thin-film which could be used as an effective inorganic gas barrier for transparent organic electronic devices.

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DC 마그네트론 스퍼터링 방법을 이용하여 증착한 IGZO 박막트랜지스터의 특성 (Characteristics of IGZO Thin Film Transistor Deposited by DC Magnetron Sputtering)

  • 김성연;명재민
    • 한국재료학회지
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    • 제19권1호
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    • pp.24-27
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    • 2009
  • Indium Gallium Zinc Oxide (IGZO) thin films were deposited onto 300 nm-thick oxidized Si substrates and glass substrates by direct current (DC) magnetron sputtering of IGZO targets at room temperature. FESEM and XRD analyses indicate that non-annealed and annealed IGZO thin films exhibit an amorphous structure. To investigate the effect of an annealing treatment, the films were thermally treated at $300^{\circ}C$ for 1hr in air. The IGZO TFTs structure was a bottom-gate type in which electrodes were deposited by the DC magnetron sputtering of Ti and Au targets at room temperature. The non-annealed and annealed IGZO TFTs exhibit an $I_{on}/I_{off}$ ratio of more than $10^5$. The saturation mobility and threshold voltage of nonannealed IGZO TFTs was $4.92{\times}10^{-1}cm^2/V{\cdot}s$ and 1.46V, respectively, whereas these values for the annealed TFTs were $1.49{\times}10^{-1}cm^2/V{\cdot}$ and 15.43V, respectively. It is believed that an increase in the surface roughness after an annealing treatment degrades the quality of the device. The transmittances of the IGZO thin films were approximately 80%. These results demonstrate that IGZO thin films are suitable for use as transparent thin film transistors (TTFTs).