• Journal of Power Electronics
• /
• 제8권2호
• /
• pp.171-180
• /
• 2008

One of the major problems in electric power quality is the harmonic contents. There are several methods of indicating the quantity of harmonic contents. The most widely used measure is the total harmonic distortion (THD). Various switching techniques have been used in static converters to reduce the output harmonic content. This paper presents and compares the two harmonic optimization techniques, known as optimal minimization of the total harmonic distortion (OMTHD) technique and optimized harmonic stepped-waveform (OHSW) technique used in multi-level inverters with unequal dc sources. Both techniques are very effective and efficient for improving the quality of the inverter output voltage. First, we describe briefly the cascaded H-bridge multi-level inverter structure. Then, we present the switching algorithm for the inverter based on OHSW and OMTHD techniques. Finally, the results obtained for the two techniques are analyzed and compared. The results verify the effectiveness of the both techniques in multi-level voltage-source inverter with non-equal dc sources, clarifying the advantages of each technique.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 1997년도 전력전자학술대회 논문집
• /
• pp.1-8
• /
• 1997

PWM(Pulse Width Modulation) 컨버터의 제어에 있어서, 입력전압의 왜곡을 고려하지 않을 경우, 시스템의 성능 저하를 초래하게 된다. 본 논문은 왜곡된 3상 입력전압이 PWM 컨버터에 미치는 영향을 분석하고, 성능을 개선하기 위한 제어기를 설계한다. 제안된 방식은 단위 역률을 만족시키면서, THD(Total Harmonic Distortion) 및 DC-link 전압의 저차 ripple을 감소시킨다.

• Journal of Power Electronics
• /
• 제14권1호
• /
• pp.48-60
• /
• 2014

Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

• Journal of Electrical Engineering and Technology
• /
• 제12권4호
• /
• pp.1484-1494
• /
• 2017

We present a two-stage inverter with high step-up conversion ratio engaging modified finite-set Model Predictive Control (MPC) for utility-integrated photovoltaic (PV) applications. The anticipated arrangement is fit for low power PV uses, the calculated efficiency at 150 W input power and 19 times boosting ratio was around 94%. The suggested high-gain dc-dc converter based on Cockcroft-Walton multiplier constitutes the first-stage of the offered structure, due to its high step-up ability. It can boost the input voltage up to 20 times. The 3S current-source inverter constitutes the second-stage. The 3S current-source inverter hires three semiconductor switches, in which one is functioning at high-frequency and the others are operating at fundamental-frequency. The high-switching pulses are varied in the procedure of unidirectional sine-wave to engender a current coordinated with the utility-voltage. The unidirectional current is shaped into alternating current by the synchronized push-pull configuration. The MPC process are intended to control the scheme and achieve the subsequent tasks, take out the Maximum Power (MP) from the PV, step-up the PV voltage, and introduces low current with low Total Harmonic Distortion (THD) and with unity power factor with the grid voltage.

• 조명전기설비학회논문지
• /
• 제27권2호
• /
• pp.84-94
• /
• 2013

In case when the existing TRIAC phase controlled dimmer is drove for the LED lighting equipments, there are many problems such as the LED flicker in low phase-angles, the acoustic noise and elements damage by increase of the peak voltage in the input filter capacitor, mulfunction by insufficiency of the TRIAC holding current, and the abnormal oscillation by LC resonant. In this paper, we proposes the single-stage quasi-resonant PSR(Primary Side Regulation) PWM converter, and the design, the simulation and experiment are performed. As a result, it could confirm that the proposed PWM converter is the lighting equipments for LED drive which can alternate the existing 60W class incandescent bulbs and it has the high drive performance of the efficiency 80% and over, the power factor 0.95 and over under the normal voltage 220V. Finally, total harmonic distortion(THD) is gratified with a standard[1] of the lighting equipments and the durability is evaluated as the high reliablilty of 150,000 hours and over.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2012년도 추계학술대회 논문집
• /
• pp.88-90
• /
• 2012

A study on an integrated single stage AC/DC converter is presented in this paper. The input current can be controlled by the auxiliary winding($L_{aux}$), auxiliary primary winding($N_3$), and the boost inductor($L_B$) which are designed to operate in discontinuous conduction mode(DCM) to reduced the total harmonic distortion(THD) of input current. The auxiliary primary winding($N_3$) is critically selected in order to compress the input capacitor voltage($V_{in}$) as well as to reduce the current stress of the switch(Q). Low total harmonic distortion(THD), low input voltage($V_{in}$) in universal input voltage($V_{AC}$), low current stress at the switching device and high efficiency are the main consideration keys in this design to achieve high performance system with low cost of single stage AC/DC converter. A 30W single stage AC/DC prototype converter is under study.

• 전력전자학회논문지
• /
• 제9권4호
• /
• pp.356-363
• /
• 2004

본 논문에서는 무정전 전원장치와 같이 일정전압 일정주파수(constant voltage and constant frequency; CVCF) 운전에 사용되는 단상 PWM 인버터의 정밀 전압제어 기법을 다루었으며 정상상태에서 전압 오차를 최소화하기 위해 phase-locked loop(PLL) 기법을 이용한 새로운 전압 제어 방법을 제안하였다. 제안된 제어기법에서는 출력 커패시터 전압과 전류를 이용하여 PLL 보상기를 구성하였으며 주제어기에 PLL 보상기를 추가하여 출력 전압의 정상상태 성능을 개선하였다. 제안된 방법의 타당성을 검증하기 위하여 시뮬레이션과 실험을 수행하였으며, 그 결과 기존의 방법에 비해 정상상태 전압제어 성능과 Total Harmonic Distortion(THD)이 현저히 개선됨을 입증할 수 있었다.

• Journal of Power Electronics
• /
• 제16권5호
• /
• pp.1661-1668
• /
• 2016

A fixed off-time controlled high power factor ac-dc LED driver is proposed in this paper, which employs a novel zero-crossing-compensation (ZCC) circuit based on a fixed off-time controlled scheme. Due to the parasitic parameters of the system, the practical waveforms have a dead region. By detecting the zero-crossing boundary, the proposed ZCC circuit compensates the control signal VCOMP within the dead region, and is invalid above this region. With further optimization of the parameters KR and Kτ of the ZCC circuit, the dead zone can be eliminated and lower THD is achieved. Finally, the chip is implemented in HHNEC 0.5μm 5V/40V HVCMOS process, and a prototype circuit, delivering 7~12W of power to several 3-W LED loads, is tested under AC input voltage ranging from 85V to 265V. The test results indicate that the average total harmonic distortion (THD) of the entire system is approximately 10%, with a minimum of 5.5%, and that the power factor is above 0.955, with a maximum of 0.999.

• 전력전자학회논문지
• /
• 제22권4호
• /
• pp.285-296
• /
• 2017

This paper proposes an improved modulation scheme for the medium voltage modular multi-level converter (MMC), which operates in the nearest level control and applies in the medium voltage direct current (MVDC) system. In the proposed modulation scheme, the offset (neutral-to-zero output) voltage is adjusted, with the phase voltage magnitude, thereby maintaining a constant value with N+1 level in the controllable modulation index (MI) range. In order to confirm the proposed scheme's validity, computer simulations for the 22.9 kV - 25 MVA MMC were performed with PSCAD/EMTDC, as well as hardware experiments for the 380 V - 10 kVA MMC. The proposed modulation scheme offers to build a constant pole voltage regardless of the MI value, and to build a phase voltage with improved total harmonic distortion (THD).

• Journal of Power Electronics
• /
• 제14권4호
• /
• pp.704-711
• /
• 2014

This paper proposes a combined fuzzy adaptive sliding-mode voltage controller (FASVC) for a three-phase UPS inverter. The proposed FASVC encapsulates two control terms: a fuzzy adaptive compensation control term, which solves the problem of parameter uncertainties, and a sliding-mode feedback control term, which stabilizes the error dynamics of the system. To extract precise load current information, the proposed method uses a conventional load current observer instead of current sensors. In addition, the stability of the proposed control scheme is fully guaranteed by using the Lyapunov stability theory. It is shown that the proposed FASVC can attain excellent voltage regulation features such as a fast dynamic response, low total harmonic distortion (THD), and a small steady-state error under sudden load disturbances, nonlinear loads, and unbalanced loads in the existence of the parameter uncertainties. Finally, experimental results are obtained from a prototype 1 kVA three-phase UPS inverter system via a TMS320F28335 DSP. A comparison of these results with those obtained from a conventional sliding-mode controller (SMC) confirms the superior transient and steady-state performances of the proposed control technique.