• 제목/요약/키워드: TFTs

검색결과 671건 처리시간 0.034초

Impact of Plasma Induced Degradation on Low Temperature Poly-Si CMOS TFTs during Etching Process

  • Chang, Jiun-Jye;Chen, Chih-Chiang;Chuang, Ching-Sang;Yeh, Yung-Hui
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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    • pp.519-522
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    • 2002
  • In this paper, we analyze the impact of plasma etching process induced device degradation on low temperature poly-Si TFTs. The results indicate the relationship between device degradation and PPID effect during plasma fabrication. The dual-gate structure, which is used to suppress leakage current, is also discussed in this research.

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Excimer-Laser Crystallization for Low-Temperature Polycrystalline Si TFTs

  • Kim, Hyun-Jae
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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    • pp.151-152
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    • 2000
  • For excimer laser crystallization (ELC), energy density, number of pulses, beam uniformity, and condition of initial amorphous Si (a-Si) films are significant factors contributing the final microstructure and the performance of low-temperature polycrystalline Si TFTs. The process and equipment have been achieved a significant improvement, but still, environmental factors associated with initial amorphous Si (a-Si) films and process conditions need to be optimized.

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A Five Mask CMOS LTPS Process With LDD and Only One Ion Implantation Step

  • Schalberger, Patrick;Persidis, Efstathios;Fruehauf, Norbert
    • Journal of Information Display
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    • 제8권1호
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    • pp.1-5
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    • 2007
  • We have developed a CMOS LTPS process which requires only five photolithographic masks and only one ion doping step. Drain/Source areas of NMOS TFTs were formed by PECVD deposition of a highly doped precursor layer while PMOS contact areas were defined by ion implantation. Single TFTs, inverters, ring oscillators and shift registers were fabricated. N and p-channel devices reached field effect mobilities of $173cm^2$/Vs and $47cm^2$/Vs, respectively.

The strategy for the fabrication of oxide TFTs with excellent device stabilities: The novel oxide TFT

  • Jeong, Jae-Kyeong;Park, Jin-Seong;Mo, Yeon-Gon;Kim, Hye-Dong
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1047-1050
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    • 2009
  • The two approaches to improve the stability of oxide TFTs are described. First approach is the optimization of device architecture including MIS structure and passivation layer using conventional InGaZnO semiconductor channel layer. Second approach is to develop the new kinds of oxide semiconductor materials, which is very robust and stable against the gate bias stress and thermal stress.

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ZnO Thin Film Transistor Prepared from ALD with an Organic Gate Dielectric

  • Choi, Woon-Seop
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.543-545
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    • 2009
  • With injection-type source delivery system of atomic layer deposition (ALD), bottom-contact and bottom-gate thin-film transistors (TFTs) were fabricated with a poly-4-vinyphenol polymeric dielectric for the first time. The properties of the ZnO TFT were greatly influenced by the device structure and the process conditions. The zinc oxide TFTs exhibited a channel mobility of 0.43 $cm^2$/Vs, a threshold voltage of 0.85 V, a subthreshold slope of 3.30 V/dec, and an on-to-off current ratio of above $10^6$ with solid saturation.

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Amorphous Oxide Semiconductor: Factors Determining TFT Performance and Stability

  • Kamiya, Toshio;Nomura, Kenji;Hosono, Hideo
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.322-325
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    • 2009
  • Amorphous oxide semiconductors (AOSs) are expected as new channel materials in TFTs for largearea and/or flexible FPDs, and several prototype displays have been demonstrated in these five years since the first report of AOS TFT. In this paper, we review fundamental materials science of AOSs that have been clarified to date in connection with operation characteristics of AOS TFTs.

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이차원 소자 시뮬레이터를 이용한 비정질 실리콘 에너지대에 관한 연구 (A Study on the Energy Band of Amorphous Silicon using a Two-Dimensional Device Simulator(TFT2DS))

  • 곽지훈;이영삼;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1997년도 추계학술대회 논문집
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    • pp.325-327
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    • 1997
  • TFT2DS was developed to provide the usability as an analytic and design tool. The static characteristics of a-Si TFTs demonstrated a good agreement between simulated and measured data. This paper shows that WDS can optimize the physical parameters of a-Si through sensitivity simulations and compute the static characteristics of a-Si TFTs.

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저전압에서 다결정 실리콘 TFT의 불균일한 특성을 보상한 새로운 AMOLED 구동회로 (A Novel Poly-Si TFT Pixel circuit for AMOLED to Compensate Threshold Voltage Variation of TFT at Low Voltage)

  • 김나영;이문석
    • 대한전자공학회논문지SD
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    • 제46권8호
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    • pp.1-5
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    • 2009
  • 본 논문에서는 저전압에서 다결정 실리콘(Polycrysta1line Silicon: Poly-Si) 박막 트랜지스터 (Thin Film Transistors: TFTs) 의 문턱전압(threshold voltage)의 불균일성을 보상한 새로운 AMOLEDs(Active Matrix Organic Light Diodes) 구동 회로를 제안한다, 제안한 회로는 6개의 스위칭, 1개의 드라이빙 TFT와 1개의 저장 콘덴서로 구성되어 있으며, SPICE 시뮬레이션을 통해 구동회로의 동작을 검증하였다. 시뮬레이션 결과 5V정도의 낮은 구동 전압($V_{DD}$)에서 제안한 화소 구동회로의 OLED 출력 전류는 0.8%정도의 오차를 갖는 반면 기본적인 구동회로의 경우 약20%정도의 오차를 갖는 것을 확인할 수 있었다. 본 논문에서 제안한 화소 구동회로는 OLED의 전류를 결정하는 driving TFT의 threshold voltage 변화에 따른 전류의 변화를 성공적으로 보상하였고, 안정화된 전류를 OLED를 흘려주어 기본적인 화소 회로가 가지고 있던 불균일화의 문제를 해결함을 알 수 있다.

Development of a New Hybrid Silicon Thin-Film Transistor Fabrication Process

  • Cho, Sung-Haeng;Choi, Yong-Mo;Kim, Hyung-Jun;Jeong, Yu-Gwang;Jeong, Chang-Oh;Kim, Shi-Yul
    • Journal of Information Display
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    • 제10권1호
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    • pp.33-36
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    • 2009
  • A new hybrid silicon thin-film transistor (TFT) fabrication process using the DPSS laser crystallization technique was developed in this study to realize low-temperature poly-Si (LTPS) and a-Si:H TFTs on the same substrate as a backplane of the active-matrix liquid crystal flat-panel display (AMLCD). LTPS TFTs were integrated into the peripheral area of the activematrix LCD panel for the gate driver circuit, and a-Si:H TFTs were used as a switching device of the pixel electrode in the active area. The technology was developed based on the current a-Si:H TFT fabrication process in the bottom-gate, back-channel etch-type configuration. The ion-doping and activation processes, which are required in the conventional LTPS technology, were thus not introduced, and the field effect mobility values of $4\sim5cm^2/V{\cdot}s$ and $0.5cm^2/V{\cdot}s$ for the LTPS and a-Si:H TFTs, respectively, were obtained. The application of this technology was demonstrated on the 14.1" WXGA+(1440$\times$900) AMLCD panel, and a smaller area, lower power consumption, higher reliability, and lower photosensitivity were realized in the gate driver circuit that was fabricated in this process compared with the a-Si:H TFT gate driver integration circuit

Improvement in the Negative Bias Stability on the Water Vapor Permeation Barriers on ZnO-based Thin Film Transistors

  • 한동석;신새영;김웅선;박재형;박종완
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.450-450
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    • 2012
  • In recent days, advances in ZnO-based oxide semiconductor materials have accelerated the development of thin-film transistors (TFTs), which are the building blocks for active matrix flat-panel displays including liquid crystal displays (LCD) and organic light-emitting diodes (OLED). In particular, the development of high-mobility ZnO-based channel materials has been proven invaluable; thus, there have been many reports of high-performance TFTs with oxide semiconductor channels such as ZnO, InZnO (IZO), ZnSnO (ZTO), and InGaZnO (IGZO). The reliability of oxide TFTs can be improved by examining more stable oxide channel materials. In the present study, we investigated the effects of an ALD-deposited water vapor permeation barrier on the stability of ZnO and HfZnO (HZO) thin film transistors. The device without the water vapor barrier films showed a large turn-on voltage shift under negative bias temperature stress. On the other hand, the suitably protected device with the lowest water vapor transmission rate showed a dramatically improved device performance. As the value of the water vapor transmission rate of the barrier films was decreased, the turn-on voltage instability reduced. The results suggest that water vapor related traps are strongly related to the instability of ZnO and HfZnO TFTs and that a proper combination of water vapor permeation barriers plays an important role in suppressing the device instability.

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