• Title/Summary/Keyword: TFT model

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Applying Theory of Constraint on Logistic Management in Large Scale Construction Sites - A Case Study of Steel Bar in TFT-LCD Factory Build-Up

  • Huang, Chih-Yao;Chen, Ching-Piao;Li, Rong-Kwei;Tsai, Chih-Hung
    • International Journal of Quality Innovation
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    • v.9 no.1
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    • pp.68-93
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    • 2008
  • The steel bars account for a high percentage of material costs for the current construction projects. At the present time, most of the construction projects for the factories of thin-film transistor liquid crystal display (TFT-LCD) complete the transactions of steel bars when the suppliers ship the steel bars to the temporary storage/processing sites. This paper applies the buy-in concept in the Theory of Constraint (TOC) on the supply chain of steel bars. In this study, suppliers are required to establish warehouses at the construction sites and complete the transactions when the formed and processed steel bars are shipped into the factory sites. The aim is to find a win-win solution to meet with the expectations from constructors as they hope that there is no need to build up inventories but supply is ready at any time. Also, this paper compares and analyzes the traditional supply/inventory model of steel bars and the Demand-Pull (D-P) model under the TOC framework. It is proved that Vendor Management Inventory (VMI) in the D-P model is able to more effectively manage steel bars as a material.

Analysis for Series Resistance of Amorphous Silicon Thin Film Transistor (비정질 실리코 박막 트랜지스터의 직렬 저항에 관한 분석)

  • Kim, Youn-Sang;Lee, Seong-Kyu;Han, Min-Koo
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.43 no.6
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    • pp.951-957
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    • 1994
  • We present a new model for the series resistance of inverted-staggered amorphous silicon (a-Si) thin film transistors (TFT's) by employing the current spreading under the source and the drain contacts as well as the space charge limited current model. The calculated results based on our model have been in good agreements with the measured data over a wide range of applied voltage, gate-to-source and gate-to-drain overlap length, channel length, and operating temperature. Our model shows that the contribution of the series resistances to the current-voltage (I-V) characteristics of the a-Si TFT in the linear regime is more significant at low drain and high gate voltages, for short channel and small overlap length, and at low operating temperature, which have been verified successfully by the experimental measurements.

Improvement of Electronic Properties and Amplification of Electron Trapping/Recovery through Liquid Crystal(LC) Passivation on Amorphous InGaZnO Thin Film Transistors

  • Lee, Seung-Hyeon;Kim, Myeong-Eon;Heo, Yeong-U;Kim, Jeong-Ju;Lee, Jun-Hyeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.267.1-267.1
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    • 2016
  • 본 연구에서는 nematic 액정의 종류 중 하나인 5CB (4-Cyano-4'-pentylbiphenyl) 물질을 박막 트랜지스터 (TFT)의 passivation 층으로 사용했을 때 그 전기적 특성향상을 확인하였다. RF-magnetron sputtering법으로 증착된 비정질 InGaZnO 박막을 활성층으로 사용한 TFT를 제작하여 그 활성층 위에 drop형식으로 passivation 하였다. 그 결과, drain current (I_DS)가 약 10배 정도 증가하고, linear region(V_D=0.5V)에서 mobility와 subthreshold slope(SS)이 각각 6.7에서 12.2, 0.3에서 0.2로 향상되는 것이 보였다. 이것은 gate bias가 인가되었을 때 freedericksz 전이를 통한 액정의 배향과 이때 형성된 dipole 형성에 의한 것으로 보이며, 이러한 LC의 배향은 편광현미경을 통하여 표면과 수직으로 배향한다는 사실을 확인 할 수 있었고 이 LC-passivation된 a-IGZO TFT의 전기적 특성의 향상에 대한 mechanism을 제시하였다. 그리고 배향한 LC가 가지는 dipole에 의해 bias stress 상황에서 독특한 electron trapping과 recovery의 증폭효과가 나타났다. V_G=+20V의 positive gate bias stress를 1000s동안 가했을 때, passivation되지 않은 a-IGZO TFT의 경우 +4V의 threshold voltage shift(${\Delta}V$_TH)가 발생되었고, 바로 -20V의 negative gate bias를 30s간 가해주었을 때 -2.5V의 ${\Delta}V$_TH가 발생하였다. 반면 LC-passivation된 a-IGZO TFT의 경우 각각 +5V와 -4V의 ${\Delta}V$_TH로 더 큰 변화를 가져왔다. 이러한 LC에 의한 electron trapping/recovery 증폭효과에 대한 model을 제시하였다.

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Circuit Modeling and Simulation of Active Controlled Field Emitter Array for Display Application (디스플레이 응용을 위한 능동 제어형 전계 에미터 어레이의 회로 모델링 및 시뮬레이션)

  • Lee, Yun-Gyeong;Song, Yun-Ho;Yu, Hyeong-Jun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.2
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    • pp.114-121
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    • 2001
  • A circuit model for active-controlled field emitter array(ACFEA) as an electron source of active-controlled field emission display(ACFED) has been proposed. The ACFEA with hydrogenated amorphous silicon thin-film transistor(a-Si:H TFT) and Spindt-type molibdenum tips (Spindt-Mo FEA) has been fabricated monolithically on the same glass. A-Si:H TFT is used as a control device of field emitters, resulting in stabilizing emission current and lowering driving voltage. The basic model parameters extracted from the electrical characteristics of the fabricated a-Si:H TFT and Spindt-Mo FEA were implemented into the ACFEA model with a circuit simulator SPICE. The accuracy of the equivalent circuit model was verified by comparing the simulated results with the measured one through DC analysis of the ACFEA. The transient analysis of the ACFEA showed that the gate capacitance of FEA along with the drivability of TFT strongly affected the response time. With the fabricated ACFEA, we obtained a response time of 15$mutextrm{s}$, which was enough to make 4bit/color gray scale with the pulse width modulation (PWM).

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Robust production and transportation planning for TFT-LCD industry under demand and price uncertainties using scenario model (시나리오 모델을 활용한 수요 및 가격 불확실성이 존재하는 TFT-LCD 산업에서의 robust 생산 및 수송계획)

  • Shin, Hyun-Joon;Ru, Jae-Pil
    • Proceedings of the KAIS Fall Conference
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    • 2010.05b
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    • pp.923-927
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    • 2010
  • 본 연구는 가격 및 수요 불확실성하의 강건한 (robust) 생산 및 수송 전략을 수립함으로써 수요 및 가격 불확실성이 존재하는 TFT-LCD 제조업 공급사슬망의 의사결정 문제를 해결하고자 한다. 품질로 구분되는 제품들의 생산, 재고 및 물류에 관한 의사결정을 조정하기 위해, 본 연구에서는 생산용량 제약, 해상/항공 수송 리드타임 및 용량 제약 등의 현실적인 제약조건들 이외에 시나리오 모델을 이용하여 수요 및 가격 불확실성을 함께 반영하는 확률적 혼합정수선형계획법모형들을 개발한다. 또한 이들 모형들의 효율적 솔루션을 위해 제안한 휴리스틱 알고리즘의 성능을 평가하도록 한다.

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Simulations of Capacitive Cross-talk Effects on TFT-LCD Operational Characteristics (TFT-LCD 특성에 미치는 Capacitive Cross-talk의 영향에 대한 시뮬레이션)

  • 윤영준;정순신;김태형;최종선
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.11a
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    • pp.557-560
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    • 1999
  • The design of large area thin film transistor liquid crystal displays (TFT-LCDs) requires consideration of cross-talks between the data lines and pixel electrodes. These limits are imposed by the parasitic capacitive elements present in a pixel. The capacitive coupling of the data line signal onto the pixel causes a pixel voltage error. In this study semi-empirical capacitance model which is adopted from VLSI interconnection capacitance calculations was used to calculate mutual coupling capacitances. With calculated mutual coupling capacitances and given image pattern, the root mean square(RMS) voltage of pixel is calculated to see vertical cross-talk from the first to the last column. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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TFT-LCD Defect Detection based on Histogram Distribution Modeling (히스토그램 분포 모델링 기반 TFT-LCD 결함 검출)

  • Gu, Eunhye;Park, Kil-Houm;Lee, Jong-Hak;Ryu, Gang-Soo;Kim, Jungjoon
    • Journal of Korea Multimedia Society
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    • v.18 no.12
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    • pp.1519-1527
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    • 2015
  • TFT-LCD automatic defect inspection system for detecting defects in place of the visual tester does pre-processing, candidate defect pixel detection, and recognition and classification through a blob analysis. An over-detection result of defects acts as an undue burden of blob analysis for recognition and classification. In this paper, we propose defect detection method based on the histogram distribution modeling of TFT-LCD image to minimize over-detection of candidate defective pixels. Primary defect candidate pixels are detected estimating the skewness of the luminance distribution histogram of the background pixels. Based on the detected defect pixels, the defective pixels other than noise pixels are detected using the distribution histogram model of the local area. Experimental results confirm that the proposed method shows an excellent defect detection result on the image containing the various types of defects and the reduction of the degree of over-detection as well.

Fabrication and Temperature Variation Characteristics of Hydrogenerated Amorphous Silicon Thin Film Transistor (비정질 실리콘 박막 트랜지터(a-si : H TFT)의 제작과 온도변화 특성)

  • 이우선;강용철;박영준;차인수
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.2
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    • pp.163-169
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    • 1992
  • A new analytical expression for the temperature variation characteristics of hydrogenerated amorphous silicon thin film transistors(a-si:H TFT), between 223K and 433K, is presented and experimentally verified. The results show that the experimental transfer and output characteristics at several temperatures are easily modeled between -5$0^{\circ}C$ and 9$0^{\circ}C$. The model is based on three functions obtained from the experimental data of IS1DT versus VS1GT. Theoretical results confirm the simple form of the model in terms of the device geometry. It was determined that as the temperature increased, the saturated drain current increased and, at a fixed gate voltage, the device saturated at increasingly larger drain voltages while the threshold voltages decreased.

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Current Increase Effect and Prevention for Electron Trapping at Positive Bias Stress System by Dropping the Nematic Liquid Crystal on the Channel Layer of the a-InGaZnO TFT's

  • Lee, Seung-Hyun;Heo, Young-Woo;Kim, Jeong-Joo;Lee, Joon-Hyung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.163-163
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    • 2015
  • The effect of nematic liquid crystal(5CB-4-Cyano-4'-pentylbiphenyl) on the amorphous indium gallium zinc oxide thin film transistors(a-IGZO TFTs) was investigated. Through dropping the 5CB on the a-IGZO TFT's channel layer which is deposited by RF-magnetron sputtering, properties of a-IGZO TFTs was dramatically improved. When drain bias was induced, 5CB molecules were oriented by Freedericksz transition generating positive charges to one side of dipoles. From increment of the capacitance by orientation of liquid crystals, the drain current was increased, and we analyzed these phenomena mathematically by using MOSFET model. Transfer characteristic showed improvement such as decreasing of subthreshold slope(SS) value 0.4 to 0.2 and 0.45 to 0.25 at linear region and saturation region, respectively. Furthermore, in positive bias system(PBS), prevention effect for electron trapping by 5CB liquid crystal dipoles was observed, which showing decrease of threshold voltage shift [(${\delta}V$]_TH) when induced +20V for 1~1000sec at the gate electrode.

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Development of Electrical Models of TFT-LCD Panels for Circuit Simulation

  • Park, Hyun-Woo;Kim, Soo-Hwan;Kim, Sung-Ha;Kim, Su-Ki;McCartney, Richard I.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.733-738
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    • 2006
  • As the film transistor-liquid crystal display (TFTLCD) panels become larger and provide higher resolution, the propagation delay of row and column lines, the voltage modulation of Vcom, and the response time of liquid crystal affect the display images now more than in the past. It is more important to understand the electrical characteristic of TFT-LCD panels these days. This paper describes the electrical model of a 15-inch XGA ($1024{\times}768$) TFT-LCD panel. The parasitic resistance and capacitance of its panel are obtained by 3D simulation of a sub pixel. The accuracy of these data is verified by the measured values in an actual panel [1]. The developed panel simulation platform, the equivalent circuit of a 15-inch XGA panel, is simulated by HSPICE. The results of simulation are compared with those of experiment, according to changing the width of signal. Especially, the proposed simulation platform for modeling TFTLCD panels can be applied to large size LCD TVs. It can help panel and circuit designers to verify their ideas without making actual panels and circuits.

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