• Journal of the Semiconductor & Display Technology
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• v.19 no.3
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• pp.68-72
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• 2020

A new method for array testing of TFT-CD panel with the integrated gate driver circuits is presented. As larger size/high resolution TFT-LCD with the peripheral driver circuits has emerged, one of the important problems for manufacturing is array testing on the panel. This paper describes the technology of detecting defective arrays and optimizing the array testing process. For the effective characterization of pixel array, the pixel storage capability is simulated and measured with voltage imaging system. This technology permits full functional testing during the manufacturing process, enabling fabrication of large TFT-LCD panels with the integrated driver circuits.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.594-597
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• 2005

This paper shows that the defect detection in TFTarray panel can be improved by using newly developed software solution without adding additional hardware instruments. Some issues are reviewed in current TFT array test and new algorithm is explained for detecting more real defects without paying the penalty of reporting more false defects in TFT array test.

• Journal of Biomedical Engineering Research
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• v.29 no.5
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• pp.392-399
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• 2008

Thin-film transistor (TFT) arrays for an x-ray detector require quite different design concept from that of the conventional active-matrix liquid crystal devices (AM-LCDs). In this paper anew design of TFT array which uses only SiNx for passivation layer is described to meet the detector performance and the product availability simultaneously. For the purpose of optimizing the design parameters of the TFT array, a Spice simulation was performed. As a result, some parameters, such as the TFT width, the data line capacitance, and the storage capacitance, were able to be fixed. The other parameters were decided within a permissible range of the TFT process especially the photolithography process and the wet etch process. Then we adapted the TFT array which had been produced by the proposed design to our prototype model (FDXD-1417 and evaluated it clinically by comparing with a commercial model (EPEX, Hologic, Beford, USA). The results say that our prototype model is slightly better than EPEX system in chest PA images. So we can prove the technical usefulness and the commercial values of the proposed TFT design.

• Proceedings of the KIEE Conference
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• 2002.11a
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• pp.71-73
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• 2002

본 연구에서는 TFT-LCD 의 동작특성을 정확하게 계산하기 위해 준 실험적인 TFT 모델을 사용하여 a-Si TFT poly-Si TFT, Organic TFT에 대하여 파라미터를 추출하였다. 이렇게 추출된 TFT의 파라미터를 TFT-LCD 등가회로에 적용하여 화소의 동작 특성에 관하여 연구하였다. 또한 보다 정확한 시뮬레이션을 위하여 VLSI분야에서 사용되는 준 실험적인 정정용량 모델과 액정의 특성과 인가된 전압에 의존하는 액정 용량모델들을 사용하여 화소의 충 방전 특성을 시뮬레이션 하였는데 대면적 고화질의 패널일수록 특성이 우수한 TFT가 적용되어야 하며, 유기 TFT를 TFT-LCD에 적용시키기 위하여 유기 TFT의 성능향상 및 고전압의 구동방식이 필요하게 된다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.137-140
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• 1998

An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate si후미 distortion and pixel charging capability. which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay, pixel charging ratio and level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1809-1811
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• 1999

In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate delay, feed-through voltage and image sticking. Gate delay is one of the biggest limiting factors for large-screen-size, high-resolution thin-film transistor liquid crystal display (TFT/LCD) design. Many driving method proposed for TFT/LCD progress. Thus we developed gate driving signal generator. Since Pixel-Design Array Simulation Tool (PDAST) can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the driving signals of gate lines on the pixel operations can be effectively analyzed.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.189-189
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• 2003

최근, Low-temperature Poly-Si(LTPS) TFT시장이 새롭게 형성됨에 따라 저온결정화 기술 연구가 활발히 진행되고 있다. 그러나, 기존의 저온결정화방법에 비해 수율이 높고 생산단가를 낮출 수 있으며 대 면적 프로세스 적용이 가능한 결정화공정개발이 시급히 필요한 실정이다. 본 연구에서는 TFT-LCD array를 구성하고 있는 데이터 라인과 ITO 공통 전극이 개별 트랜지스터의 소스와 드레인에 연결되어있다는 점에 착안하여, 전계를 이용한 방향성유도결정화법(Field Aided Lateral Crystallization)을 이에 적용하였으며 채널영 역의 균일한 결정화를 위하여 컨택홀의 모양에 변화를 주어 결정화 실험을 진행하였다. 이 방법은 간단한 공정(TFT-LCD way를 통한 전계 인가 및 열처리)으로 패널내의 모든 채널영 역을 균일하게 결정화할 수 있을 것으로 기대되는 방식이다.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1568-1570
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• 2008

In this paper, fabrication of a $60{\times}48$ polymer TFT array with a top-gate structure on plastic substrates using a low temperature printing process will be presented and the device structure and manufacturing processes will be discussed. The polymer TFT array showed excellent air stability and uniform electrical characteristics over a large area. Finally, a 1.5 inch EPD display with 50 dpi resolution using the polymer TFT array will be demonstrated for e-film device applications.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.39-39
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• 2003

• Proceedings of the Korean Ceranic Society Conference
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• 2003.04a
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• pp.178.1-178
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• 2003