• Journal of the Korean Chemical Society
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• v.61 no.4
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• pp.185-190
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• 2017

One-dimensional CdTe nanorods (NRs) are obtained by the reaction of various Cd precursors with single crystalline Te nanorod templates, which are pre-synthesized from Te precursors by a simple and reproducible solvothermal method. Throughout the process, the diffraction intensity of different crystal facets of single crystalline Te NRs varied with reaction times. Finally, by alloying Cd ions along the axial direction of Te NRs, polycrystalline cubic phase CdTe NRs with diameters of 80-150 nm and length up to $1.2-2.4{\mu}m$ are obtained. The nucleation and growth processes of Te and CdTe NRs are discussed in details, and their properties are characterized by XRD, SEM, TEM, Raman scattering, and UV-vis absorption spectra. It was found that the key elements of synthesizing CdTe NRs such as reaction temperatures and Cd sources will strongly influence the final shape of CdTe NRs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.419-420
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• 2008

In this work, we report several experimental data capable of evaluating the phase transition characteristics of (InTe)x(GeTe)y (x = 0.1, 0.3, y =1) pseudo-binary thin films. (InTe)x(GeTe)y phase change thin films have been prepared by thermal evaporator. The crystallization characteristics of amorphous (InTe)x(GeTe)y thin films were investigated by using nano-pulse scanner with 658 nm laser diode (power : 1~17 mW, pulse duration : 10~460 ns) and XRD measurement. It was found that the crystalline speed of In-Ge-Te thin films are faster than $Ge_2Sb_2Te_5$[1] and also the crystalline temperature is higher. Changes in the optical transmittance of as-deposited and annealed films were measured using a UV-VIS-IR spectrophotometer and four-point probe was used to measure the sheeresistance of InGeTe films annealed at different temperature.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.8
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• pp.172-177
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• 2014

We present on a threshold switching device based on AsGeTeSi material which is significantly improved by two $N_2$ processes: reactive $N_2$ during deposition, and $N_2$ plasma hardening. The introduction of N2 in the two-step processing enables a stackable and thermally stable device structure, is allowing integration of switch and memory devices for application in nano scale array circuits. Despite of its good threshold switching characteristics, AsTeGeSi-based switches have had key issues with reliability at a high temperature to apply resistive memory. This is usually due to a change in a Te concentration. However, our chalconitride switches(AsTeGeSiN) show high temperature stability as well as high current density over $1.1{\times}10^7A/cm^2$ at $30{\times}30(nm^2)$ celll. A cycling performance of the switch was over $10^8$ times. In addition, we demonstrated a memory cell consisted of 1 switch-1 resistor (1S-1R) stack structure using a TaOx resistance memory with the AsTeGeSiN select device.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.7
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• pp.585-593
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• 2008

In this work, we report several experimental data capable of evaluating the phase transformation characteristics of GeSbTe pseudobinary thin films comprehensively utilized as phase change materials. The phase transformation of the GeSbTe thin films was confirmed by XRD measurement from amorphous to hexagonal structure via fee structure except for $Ge_8Sb_2Te_{11}$. In addition, X-ray photoelectron spectra analysis revealed to weaken Ge-Te bond for $Ge_2Sb_2Te_5$ and to strengthen the bonds of all elements for $Ge_8Sb_2Te_{11}$ during the amorphous to crystalline transition. The values of optical energy gap $(E_{OP})$ were around 0.71 and 0.50 eV and the slopes of absorption in extended region (B) were ${\sim}5.1{\times}10^5$ and ${\sim}10{\times}10^5cm^{-1}{\cdot}V^{-1}$ for the amorphous and fcc-crystalline structures, respectively. Finally, the kinetics of amorphous-to-crystalline phase change on the GeSbTe films was characterized using a nano-pulse scanner with 658-nm laser diode (power; $1{\sim}17$ mW, pulse duration; $10{\sim}460$ ns).

• Korean Journal of Materials Research
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• v.8 no.11
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• pp.1055-1060
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• 1998

Thermoelectric properties of ($Pb_{1-x}Sn_x$)Te ($0\leq{x}\leq{0.4}$) alloys, fabricated by mechanical alloying and hot pressing, were investigated with variation of the SnTe content. For the hot-pressed PbTe and ($Pb_{0.9}Sn_{0.1}$)Te. transition from p-type to n-type occurred at $200^{\circ}C$ and $300^{\circ}C$, respectively. However, the specimens containing SnTe more than 0.2mole exhibited p-type conduction up to 450'C. In extrinsic conduction region, the Seebeck coefficient and electrical resistivity of the hot-pressed ($Pb_{1-x}Sn_x$)Te decreased with increasing the SnTe content. The temperature at which the hot-pressed (Pbl-,Sn,)Te exhibited a maximum figure-of-merit was shifted to higher temperature with increasing the SnTe content The hot-pressed (Pbo ,Sno dTe exhibited a maximum figure-of-merit of $0.68\times10_{-3}/K$ at $200^{\circ}C$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.6
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• pp.1349-1354
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• 2011

In this work, we fabricated the CdZnS/CdTe heterojunction and investigated the C-V characteristics to determine the depletion width and the charge density distribution. A parallel experiment on CdS/CdTe heterojunction was also carried out for comparison. The depletion region width, for CdZnS/CdTe heterojunction, was nearly constant, regardless of bias voltage. However, the depletion region was wider than that of CdS/CdTe heterojunction due to high resistivity of CdZnS film. The interface charge density of CdZnS/CdTe heterojunction was increased linearly with the bias voltage and showed lower values than those for CdS/CdTe junction. The open circuit voltage of CdZnS/CdTe heterojunction solar cells increased with zinc mole ratio due to reducing of the electron affinity difference between CdZnS and CdTe films. However, the increase of series resistance due to the high resistivity of Cd1-xZnxS films results in reducing conversion efficiency.

• Bulletin of the Korean Chemical Society
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• v.31 no.5
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• pp.1123-1127
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• 2010

We report a simple and quick route for the preparation of high-quality, nearly monodisperse $Bi_2Te_3$, $Sb_2Te_3$, and $Bi_xSb_{2-x}-Te_3$ nanocrystallites. The reactions of bismuth acetate or antimony acetate with Te in oleic acid result in pure phase of $Bi_2Te_3$ or $Sb_2Te_3$ nanoparticles, respectively. Also, ternary $Bi_xSb_{2-x}Te_3$ nanoparticles were successfully synthesized using the same method. The size and morphology of the nanoparticles were controlled by varying the stabilizing agents. The as-prepared nanoparticles are characterized by X-ray diffraction, scanning electron microscope, and high-resolution transmission electron microscope using an energy dispersive spectroscopy.

• Proceedings of the KIEE Conference
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• 1987.11a
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• pp.200-202
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• 1987

Sintered CdS films on glass substrate with low electrical resistivity and high optical transmittance have been prepared by coating and sintering method. All-polycrystalline CdS/CdTe solar cells with different microstructure and properties of CdTe layer were fabricated by coating a number of CdTe slurries, which consisted of Cd and Te powders, an appropriate amount of propylene glycol and 2 or 7.5 w/o $CdC1_2$, on the sintered CdS films and by sintering the glass-CdS-(Cd+Te) composites at various temperature. To explore the dependence of the solar efficiency on the preparation conditions of the CdTe layer, Cd powder with an average particle size of $0.3{\mu}m$ or $5{\mu}m$ was prepared. The use of Cd with finer particles forms more dense or uniform microstructure of the nuclear of CdTe during the heating. Therefore the use of Cd with finer particles improves the efficiency of the sintered CdS/CdTe solar cell by improving the microstructure of sintered CdTe layer. But the difference of solar efficiency by varing a particle size of Cd is decreased with increasing amount of $CdC1_2$ in the (Cd+Te) layer. All-polycrystalline CdS/CdTe solar cells with an efficiency of 10.2% under solar irradiation have been fabricated using a Cd with finer particles.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.10
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• pp.918-922
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• 2006

Chalcogenide Phase change memory has the high performance necessary for next-generation memory, because it is a nonvolatile memory with high programming speed, low programming voltage, high sensing margin, low power consumption and long cycle duration. To minimize the power consumption and the program voltage, the new composition material which shows the better phase-change properties than conventional $Ge_2Sb_2Te_5$ device has to be needed by accurate material engineering. In the present work, we investigate the basic thermal and the electrical properties due to phase-change compared with chalcogenide-based new composition $Ge_1Se_1Te_2$ material thin film and convetional $Ge_2Sb_2Te_5$ PRAM thin film. The fabricated new composition $Ge_1Se_1Te_2$ thin film exhibited a successful switching between an amorphous and a crystalline phase by applying a 950 ns -6.2 V set pulse and a 90 ns -8.2 V reset pulse. It is expected that the new composition $Ge_1Se_1Te_2$ material thin film device will be possible to applicable to overcome the Set/Reset problem for the nonvolatile memory device element of PRAM instead of conventional $Ge_2Sb_2Te_5$ device.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1341-1342
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• 2006

Electrical characteristics of field-effect thin film transistors (TFTs) with p-channels of CdTe/CdHgTe core-shell nanocrystals are investigated in this paper. For the fabrication of bottom- and top-gate TFTs, CdTe/CrHgTe nanocrystals synthesized by colloidal method are first dispersed on oxidized p+ Si substrates by spin-coating, the dispersed nanoparticles are sintered at $150^{\circ}C$ to form the channels for the TFTs, and $Al_{2}O_{3}$ layers are deposited on the channels. A representative bottom-gate field-effect TFT with a bottom-gate $SiO_2$ layer exhibits a mobility of $0.21cm^2$/ Vs and an Ion/Ioff ratio of $1.5{\times}10^2$ and a representative top-gate field-effect TFT with a top-gate $Al_{2}O_{3}$ layer provides a field-effect mobility of $0.026cm^2$/ Vs and an Ion/Ioff ratio of $2.5{\times}10^2$. $Al_{2}O_{3}$ was deposited for passivation of CdTe/CdHgTe core-shell nanocrystal layer, resulting in enhanced hole mobility, Ior/Ioff ratio by 0.25, $3{\times}10^3$, respectively. The CdTe/CdHgTe nanocrystal-based TFTs with bottom- and top gate geometries are compared in this paper.