• Title/Summary/Keyword: T-gate

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The Study on Parallel operation of IGBT for the Medium SE the Large capacity Inverter ($\cdot$ 대용량 인버터용 IGBT 병렬 운전 연구)

  • Park G.T.;Yoon J.H.;Jung M.K.;Kim D.S.
    • Proceedings of the KIPE Conference
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    • 2003.07a
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    • pp.430-433
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    • 2003
  • IGBTS are widely used for the industrial inverters in the mid power range at low voltage (440V$\~$660V) application. Advantageous features of the device are simple gate drive and high speed switching capability. Due to these advantages the application of IGBTS is enlarging into the high power application. However, to increase the power handling capacity at lower input voltage level, the current rating in each bridge arm must be enlarged. Therefore the parallel operation of IGBT devices is essentially needed. This paper describes the feasible parallel structures of the power circuit for the mid & the high power inverters and introduces the important design condition for the parallel operation of IGBT devices. To verify feasibility of the IGBT parallel operation, the feature of several IGBT devices (EUPEC, SEMIKRON's IGBT) are investigated and the power stacks are implemented and tested with these devices. The experimental results show the good characteristics for the parallel operation of IGBTS.

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Study on Life Evaluation of Die Casting Mold and Selection of Mold Material (다이캐스팅 금형의 내구 수명평가와 금형강 소재 선정에 대한 연구)

  • Kim, Jinho;Hong, Seokmoo;Lee, Jong-Chan
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.12 no.3
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    • pp.7-12
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    • 2013
  • In Die casting process, the problem of die degradation is often issued. In oder to increase of die life the material degradation of die steel was investigated using test core pins. Three test core pins were positioned in front of the gate entry and observed washout and soldering resistance during Mg die casting process. The test parameters are set as different commercial die materials, coatings condition and hardness of die surface. Usign 220t magnesium die casting machine was employed to cast AZ91 magnesium alloys. After 150 shots, macroscopic observation of die surface was carried out. Additional 50 cycles later, test pins were chemically cleaned with 5% HCl aqueous solution to find out the existence of washout and soldering layers. Microstructural characterization of die surface and the die roughness measurement were performed together. Computational simulation using AnyCasting program was also beneficial to correlate the extent of die damage with the position of test pin inside die cavity. As results, the optimal combination of die steel with productive coating as well as its hardness was drawn out. it will be helpful to decide the material and condition considering increasing of tool life.

A study on the Use of site related to the site characteristics of the Elementary School in GwangJu-city (초등학교 입지특성에 따른 교지 이용에 관한 조사연구)

  • Kang, Man-Ho;Jeong, Joo-Seung;Joo, Seok-Joong
    • Journal of the Korean Institute of Educational Facilities
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    • v.11 no.4
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    • pp.15-24
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    • 2004
  • The purpose of this study is to suggest some alternative on site planning of elementary school through investigating the effects of geographical and urban environment on the site. For this, we selected and surveyed 35 schools in Gwangju. The results of this study are as follows. 1) We cannot find out the differences from the use of elementary schools sites on slopes of sites. However, the sunken space between H type buildings in the site slopes facing east or west and the placing the playground on the north side of the site slopes facing north have some problems 2) The number of adjacent road and surrounding environment didn't show any effect. To separate between cars and pedestrians, we need some plans to block cars on the pedestrian gateway and it is much better to intensify the parking area near the school gate that cars come in and out. 3) The degree of satisfaction on the outdoor facilities of these cases shows low level. Therefore, to use the site of schools efficiently, we should secure the spacious playground and make plans to provide some spaces around school building for the static activities of students and teachers. 4) Most of all, the site which is suitable for educational environment should be selected. and also Special Code on the urban plan should be established to develop this one.

A Study on Signal Processing Using Multiple-Valued Logic Functions (디치논리 함수를 이용한 신호처리 연구)

  • 성현경;강성수;김흥수
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.12
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    • pp.1878-1888
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    • 1990
  • In this paper, the input-output interconnection method of the multi-valued signal processing circuit using perfect Shuffle technique and Kronecker product is discussed. Using this method, the design method of circuit of the multi-valued Reed-Muller expansions(MRME) to be used the multi-valued signal processing on finite field GF(p**m) is presented. The proposed input-output interconnection method is shown that the matrix transform is efficient and that the module structure is easy. The circuit design of MRME on FG(p**m) is realized following as` 1) contructing the baisc gates on GF(3) by CMOS T gate, 2) designing the basic cells to be implemented the transform and inverse transform matrix of MRME using these basic gates, 3) interconnecting these cells by the input-output interconnecting method of the multivalued signal processing circuits. Also, the circuit design of the multi-valued signal processing function on GF(3\ulcorner similar to Winograd algorithm of 3x3 array of DFT (discrete fourier transform) is realized by interconnection of Perfect Shuffle technique and Kronecker product. The presented multi-valued signal processing circuits that are simple and regular for wire routing and posses the properties of concurrency and modularity are suitable for VLSI.

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Advanced ZigBee Baseband Processor with Variable Data Rates for Internet-of-things Applications

  • Hwang, Hyunsu;Jang, Soohyun;Lee, Seongjoo;Jung, Yunho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.56-64
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    • 2017
  • In this paper, an advanced ZigBee (AZB) system for internet-of-things (IoT) applications is proposed which can support various data rates from 31.25 Kbps to 2 Mbps, and the implementation results of the AZB baseband processor are presented. Repetition coding for 32-chip direct-sequence spread spectrum (DSSS) symbol is applied for low rates under 250 Kbps to extend the coverage. Convolution coding, puncturing, and interleaving for non-DSSS symbol are performed for high rates from 500 Kbps to 2 Mbps for multi-media services. Simulation results show that the coverage increases at the rate of 51.8-77.3% for various environments compared with IEEE 802.15.4 ZigBee. AZB baseband processor was implemented in 180 nm CMOS process and total gate counts are 260K with the size of $5.8mm^2$.

Development of A X-band 12 W High Power Amplifier MMIC (X-대역 12-W 급 고출력증폭기 MMIC 개발)

  • Chang, Dong-Pil;Noh, Youn-Sub;Lee, Jeong-Won;Ahn, Ki-Burm;Uhm, Man-Seok;Yom, In-Bok;Na, Hyung-Ki;Ahn, Chang-Soo;Kim, Sun-Joo
    • Journal of the Korea Institute of Military Science and Technology
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    • v.12 no.4
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    • pp.446-451
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    • 2009
  • In this paper, we described the design and test results of a high output power amplifier MMIC developed by using 0.5um power pHEMT processes on a 6-inch GaAs wafer for the X-band T/R module application. In the MMIC design, we have used a simple on-chip gate active bias technology to compensate the threshold-voltage variation of pHEMT during the fabrication process and 16-to-1 power combining method to achieve the output power over 10watt. The fabricated chip has an output power over 12watts and maximum PAE of 32% over the frequency range of fo +/-750MHz.

Characteristics of ZnO Thin Films by Means of ALD for the Application of Transparent TFT

  • ParkKo, Sang-Hee;Hwang, Chi-Sun;Kwack, Ho-Sang;Kang, Seung-Youl;Lee, Jin-Hong;Chu, Hye-Yong;Lee, Yong-Eui
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1564-1567
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    • 2005
  • Zinc oxide thin films were grown at the t emperature of $100^{\circ}C$ and $150^{\circ}C$ by means of plasma enhanced atomic layer deposition (PEALD) and conventional atomic layer deposition for applying to the transparent thin film transistor (TTFT). The growth rate of $1.9{\AA}/cycle$ with oxygen plasma is similar to that of film grown with water. While the sheet resistivity of ZnO grown with water is 1233 ohm/sq, that of film grown with oxygen plasma was too high to measure with 4 point probe and hall measurement system. The resistivity of the films grown with oxygen plasma estimated to be $10^6$ times larger than that of the films grown with water. The difference of electrical property between two films was caused by the O/Zn atomic ratio. We fabricated ZnO-TFT by means of ALD for the first time and the ZnO channel fabricated with water showed saturation mobility of $0.398cm^2/V{\cdot}s$ with bottom gate configuration.

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A Latch-Up Immunized Lateral Trench IGBT with $p^{+}$ Diverter Structure for Smart Power IC (스마트 파워 IC를 위한 $p^{+}$ Diverter 구조의 횡형 트랜치 IGBT)

  • 문승현;강이구;성만영;김상식
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.14 no.7
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    • pp.546-550
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    • 2001
  • A new Lateral Trench Insulated Gate Bipolar Transistor(LTIGBT) with p$^{+}$ diverter was proposed to improve the characteristics of the conventional LTIGBT. The forward blocking voltage of the proposed LTIGBT with p$^{+}$ diverter was about 140V. That of the conventional LTIGBT of the same size was 105V. Because the p$^{+}$ diverter region of the proposed device was enclosed trench oxide layer, he electric field moved toward trench-oxide layer, and punch through breakdown of LTIGBT with p$^{+}$ diverter was occurred, lately. Therefore, the p$^{+}$ diverter of the proposed LTIGBT didn't relate to breakdown voltage in a different way the conventional LTIGBT. The Latch-up current densities of the conventional LTIGBT and proposed LTIGBT were 540A/$\textrm{cm}^2$, and 1453A/$\textrm{cm}^2$, respectively. The enhanced latch-up capability of the proposed LTIGBT was obtained through holes in the current directly reaching the cathode via the p$^{+}$ divert region and p$^{+}$ cathode layer beneath n$^{+}$ cathode layer./ cathode layer.

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Process Characteristics of Thin Dielectric at MOS Structure (MOS 구조에서 얇은 유전막의 공정 특성)

  • Eom, Gum-Yong;Oh, Hwan-Sool
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.207-209
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    • 2004
  • Currently, for satisfying the needs of scaled MOSFET's a high quality thin oxide dielectric is desired because the properties of conventional $SiO_2$ film are not acceptable for these very small sized transistors. As an alternative gate dielectric have drawn considerable alternation due to their superior performance and reliability properties over conventional $SiO_2$, to obtain the superior characteristics of ultra thin dielectric films, $N_2O$ grown thin oxynitride has been proposed as a dielectric growtuanneal ambient. In this study the authors observed process characteristics of $N_2O$ grown thin dielectric. In view points of the process characteristics of MOS capacitor, the sheet resistance of 4.07$[\Omega/sq.]$, the film stress of $1.009e^{10}[dyne/cm^2]$, the threshold voltage$(V_t)$ of 0.39[V], the breakdown voltage(BV[V]) of 11.45[V] was measured in PMOS. I could achieve improved electrical characteristics and reliability for deep submicron MOSFET devices with $N_2O$ thin oxide.

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A study on the molding of dome shaped plastic parts embedded with electronic circuits (전자회로 일체형 돔 형상의 플라스틱 부품 성형에 관한 연구)

  • Seong, Gyeom-Son;Lee, Ho-Sang
    • Design & Manufacturing
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    • v.14 no.1
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    • pp.15-21
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    • 2020
  • Smart systems in different application areas such as automotive, medical and consumer electronics require a novel manufacturing method of electronic, optical and mechanical functions into products. Traditional methods including mechanical assembly, bonding of plastic and electronic circuit cause the problems in large size of products and complicated manufacturing processes. In this study, thermoforming and film insert molding were applied to fabricate a dome shaped plastic part embedded with electronic circuits. The deformation of patterns printed on PET film was predicted by thermoforming simulation using T-SIM, and the results were compared with those by experiment. In order to decrease spring-back after thermoforming, the Taguchi method of design of experiment was used. Through ANOVA analysis, it was found that mold temperature was the most dominant parameter for spring-back. By using flow analysis, gate design was performed to decrease injection pressure. During film insert molding, the wash-out of ink printed on film occurred for Polycarbonate. When the resin was changed to PMMA, the wash-out disappeared due to low melt temperature.