• Title/Summary/Keyword: T-gate

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Effects of $WSi_x$, thickness and F concentration on gate oxide characteristics in tungsten polycide gate structure (Tungsten polycide gate 구조에서 $WSi_x$ 두께와 fluorine 농도가 gate oxide 특성에 미치는 영향)

  • 김종철
    • Journal of the Korean Vacuum Society
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    • v.5 no.4
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    • pp.327-332
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    • 1996
  • In this study, the effects of $WSi_x$, thickness and fluorine concentration in tungsten polycide gate structure on gate oxide were investigated. As $WSi_x$, thickness increases, gate oxide thickness increases with fluorine incorporation in gate oxide, and time-to-breakdown($T_{BD,50%}$) of oxide decreases. The stress change with $WSi_x$ thickness was also examined. But it is understood that the dominant factor to degrade gate oxide properties is not the stress but the fluorine, incorporated during $WSi_x$ deposition, diffused into $WSiO_2$ after heat treatment. In order to understand the effect of fluorine diffusion into oxidem fluorine ion implanted gates were compared. The thickness variation and $T_{BD,50%}$ of gate oxide is saturated over 600 $\AA$ thickness of $WSi_x$. The TEM and SIMS studies show the microstructure less than 600 $\AA$ thickness is dense and flat in surface. However, over 600$\AA$, the microstructure of $WSi_x$ is divided into two parts: upper porous phase with rugged surface and lower dense phase with smmoth interface. And this upper phase is transformed into oxygen rich crystalline phase after annealing, and the fluorine is captured in this layer. Therefore, the fluorine diffusion into the gate oxide is saturated.

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Assessing Nonpoint Sources Pollution Affected by Regulating Gate and Liquid Manure Application in Small Agricultural Watershed (제수문 영향 및 액비시용 증가에 따른 농업소유역에서의 비점오염원 특성 평가)

  • Song, Jae-Do;Jang, Taeil;Son, Jae-Kwon
    • Journal of The Korean Society of Agricultural Engineers
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    • v.58 no.6
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    • pp.31-38
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    • 2016
  • The purpose of this study was to assess nonpoint sources (NPS) pollution affected by liquid manure and regulating gate in a small agricultural watershed. The study area, which is a wide plain farmland, was operating by the Buyong regulating gate in order to maintain irrigation water level during irrigation period. Consequentially, runoff only occurs through the gate at each event in rainy season for avoiding farmland inundation. In addition, the usage ratio of liquid manure in the study area has been increased greatly since 2014. Discharge loads at the Hwaingsan bridge subwatershed were 1.2 times for T-N, 4-10 times for T-P, and 3-8 times for TOC compared with the Soyang watershed (control) during study period. The reason was that NPS pollutants from upper Gpeun and Sangri bridge subwatersheds, which are widely spraying with livestock liquid manure, were stack at this subwaterehd because of regulating gate in non-rainy seasons. A number of agricultural watersheds in Saemangeum watershed are affected by regulating gate and vigorous livestock activities so that substantial management schemes under controling regulating gate are needed for minimizing livestock related NPS.

Studies on the Fabrication of 0.2 ${\mu}m$Wide-Head T-Gate PHEMT′s (0.2 ${\mu}m$ Wide-Head T-Gate PHEMT 제작에 관한 연구)

  • Jeon, Byeong-Cheol;Yun, Yong-Sun;Park, Hyeon-Chang;Park, Hyeong-Mu;Lee, Jin-Gu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.1
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    • pp.18-24
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    • 2002
  • n this paper, we have fabricated pseudomorphic high electron mobility transistors (PHEMT) with a 0.2 ${\mu}{\textrm}{m}$ wide-head T-shaped gate using electron beam lithography by a dose split method. To make the T-shape gate with gate length of 0.2 ${\mu}{\textrm}{m}$ and gate head size of 1.3 ${\mu}{\textrm}{m}$ we have used triple layer resist structure of PMMA/P(MMA-MAA)/PMMA. The DC characteristics of PHEMT, which has 0.2 ${\mu}{\textrm}{m}$ of gate length, 80 ${\mu}{\textrm}{m}$ of unit gate width and 4 gate fingers, are drain current density of 323 ㎃/mm and maximum transconductance 232 mS/mm at $V_{gs}$ = -1.2V and $V_{ds}$ = 3V. The RF characteristics of the same device are 2.91㏈ of S21 gain and 11.42㏈ of MAG at 40GHz. The current gain cut-off frequency is 63GHz and maximum oscillation frequency is 150GHz, respectively.ively.

0.25um T-gate MESFET fabrication by using the size reduction of pattern in image reversal process (형상반전공정의 패턴형성시 선폭감소를 이용한 0.25um T-gate MESFET의 제작)

  • 양전욱;김봉렬;박철순;박형무
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.1
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    • pp.185-192
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    • 1995
  • In this study, very fine photoresist pattern was examined using the image reversal process. And very fine photoriesist pattern (less than 0.2um) was obtsined by optimizing the exposure and reversal baking condition of photoresist. The produced pattern does not show the loss of thickness, and has a sparp negative edge profile. also, the ion implanted 0.25um T-shaped gate MESFET was fabricated using this resist pattern and the directional evaporation of gate metal. The fabricated MESFET has the maximum transconductance of 302 mS/mm, and the threshold voltage of -1.8V, and the drain saturation current of this MESFET was 191 mA/mm.

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The Threshold Voltage and the Effective Channel Length Modeling of Degraded PMOSFET due to Hot Electron (Hot electron에 의하여 노쇠화된 PMOSFET의 문턱전압과 유효 채널길이 모델링)

  • 홍성택;박종태
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.8
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    • pp.72-79
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    • 1994
  • In this paper semi empirical models are presented for the hot electron induced threshold voltage shift(${\Delta}V_{t}$) and effective channel shortening length (${\Delta}L_{H}$) in degraded PMOSFET. Trapped electron charges in gate oxide are calculated from the well known gate current model and ΔLS1HT is calculated by using trapped electron charges. (${\Delta}L_{H}$) is a function of gate stress voltage such as threshold voltage shift and degradation of drain current. From the correlation between (${\Delta}L_{H}$) has a logarithmic function of stress time. From the measured results, (${\Delta}V_{t}$) and (${\Delta}L_{H}$) are function of initial gate current and device channel length.

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A Study on the Reduction of Current Kink Effect in NMOSFET SOI Device (NMOSFET SOI 소자의 Current Kink Effect 감소에 관한 연구)

  • Han, Myoung-Seok;Lee, Chung-Keun;Hong, Shin-Nam
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.35T no.2
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    • pp.6-12
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    • 1998
  • Thin film SOI(Silicon-on-insulator) device offer unique advantages such as reduction in short channel effects, improvement of subthreshold slope, higher mobility, latch-up free nature, and so on. But these devices exhibit floating-body effet such as current kink which inhibits the proper device operation. In this paper, the SOI NMOSFET with a T-type gate structure is proposed to solve the above problem. To simulate the proposed device with TSUPREM-4, the part of gate oxide was considered to be 30nm thicker than the normal gate oxide. The I-V characteristics were simulated with 2D MEDICI. Since part of gate oxide has different oxide thickness, the gate electric field strength is not same throughout the gate and hence the impact ionization current is reduced. The current kink effect will be reduced as the impact ionization current drop. The reduction of current kink effect for the proposed device structure were shown using MEDICI by the simulation of impact ionization current, I-V characteristics, and hole current distribution.

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Analysis of $f_T$ and $f_{max}$ Dependence on Unit Gate Finger Width for RF Performance Optimization of MOSFETs (MOSFET의 RF 성능 최적화를 위한 단위 게이트 Finger 폭에 대한 $f_T$$f_{max}$의 종속데이터 분석)

  • Cha, Ji-Yong;Cha, Jun-Young;Jung, Dae-Hyoun;Lee, Seong-Hearn
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.9
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    • pp.21-25
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    • 2008
  • In this study, to maximize RF performance of MOSFETs, $f_T$ and $f_{max}$ dependent data on $W_u$ are measured and newly analyzed by extracting small-signal model parameters. From the physical analysis results, it is found that a peak value of $f_T$ is generated by $W_u$-independent parasitic gate-bulk capacitance at narrow $W_u$ and the wide width effect of reducing the increasing rate of transconductance at wide $W_u$. In addition, it is revealed that a maximum value of $f_{max}$ is caused by the non-quasi-static effect that the gate resistance is greatly reduced at narrow $W_u$ and becomes constant at wide $W_u$.

Construction of Combinational MVL Function Based on T-Gate Integrated Module (T-게이트 통합 모듈에 의한 조합 MVL 함수의 구성)

  • 박동영;최재석;김흥수
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.11
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    • pp.1839-1849
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    • 1989
  • An optimal variable assignment algorithm is presented as a decomposition method of MVL functions. A given 3-valued combinational logic function is disintegrated into subfunction composed of the function dependant relation, then extracted implicant output elements from subfunctions are assigned to a T-gates. As a circuit implementation tool, a programmable integarated T-gate module is proposed, and the construction procedure of combinational MVL functions is systematized in each step. This method is expected to give properties of the systematic procedure, possibility of T-gate number reduction, unification of module, and flexibility of module composition. Specially variable decomposition method can be pointed out as an approach to solving the limitation problem of the input and output terminal number in VLSI implementations.

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Two-step electron beam lithography to fabricate 20 nm T-gate (20 nm급 T-형 게이트 제작을 위한 2단 전자 빔 노광 공정)

  • Lee, Kang-Sung;Kim, Young-Su;Lee, Kyung-Taek;Hong, Yun-Ki;Jeong, Yoon-Ha
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.555-556
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    • 2006
  • In this paper, we have proposed a novel process using two-step electron beam lithography to fabricate 20 nm T-gates for high performance MODFETs. Two-step lithography reduces electron forward scattering by defining the foot on a thin (100 nm) bottom-layer of polymethyl methacrylate (PMMA) at the second step, the T-gate head having been developed at the first step. Adopting a low temperature development technique for the second step reduces the detrimental effect of head exposure on foot definition. We have shown that 20 nm T-gate can be patterned with this process.

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