• Journal of The Institute of Information and Telecommunication Facilities Engineering
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• v.1 no.1
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• pp.6-25
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• 2002

In this paper, we have implemented UPnP Devices which emulate a Control Point, a Light Controller, and a Digital TV. The Control Point has been developed on Linux host system by using C language. The UPnP Devices emulating the Digital TV and Light Controller are running on embedded linux developer board. For the development of UPnP Devices, UPnP SDK API Vl.04 made by Intel Co. Ltd. has been ported on Assabet Linux Reference board to implement the UPnP protocol. After we analyze and design some services of Digital TV device, we have applied UPnP Device program to those devices. UPnP SDK vl .04 consists of APIs which support HTTP, SSDP, SOAP, GENA and XML DOM Level-1 that are cores of UPnP protocol. The C program written for the UPnP Control Point has been compiled and executed on Linux-based PC. The embedded system running on Embedded Linux OS has been connected all together through Ethernet which allows IP-based communications. Under this environment, the UPnP programs are being executed on each device. Control Point, when in operational mode, discovers UPnP Devices on the network and displays the device list on the consol. By selecting one of the functionalities of the device services that are displayed on the Control Point, the controllability has been accomplished. The experiment that we performed in this thesis have revealed that the Control Point and UPnP Devices have supported the protocols including SSDP, SOAP, GENA, and DHCP.

• Cartoon and Animation Studies
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• s.14
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• pp.165-176
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• 2008

In the future there would be many kinds of digital images for many industrial markets. 3D stereoscopic images for variable fields; medical operation, film and animation, broadcasting, internet, game, or design for art and architecture. And many people to work about computer programming, and digital image making will concern about it more and more. However, these kinds works and studies are focused on the professional technical fields like 3D display or computer programming technology so far. To revitalize the market of a variable stereoscopic contents, there should build up the foundation for easy processing of the making stereoscopic images. This paper is based on stereoscopic making skills for anaglyph system. An anaglyph system has an old history about making stereoscopic images, and very simple method to produce the stereoscopic images. Particularly this study is focused on color compositing technique, and camera positioning on the compositing system. It will help optimization of the environments to create 3D motion graphic and animation contents.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.2 s.332
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• pp.61-74
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• 2005

Digital Multimedia Broadcasting(DMB) is a reliable multi-service system for reception by mobile and portable receivers. DMB system allows interference-free reception under the conditions of multipath propagation and transmission errors using COFDM modulation scheme, simultaneously, needs powerful channel error's correction ability. Viterbi Decoder for DMB receiver uses punctured convolutional code and needs lots of computations for real-time operation. So, it is desired to design a high speed and low-power hardware scheme for Viterbi decoder. This paper proposes a combined add-compare-select(ACS) and path metric normalization(PMN) unit for computation power. The proposed PMN architecture reduces the problem of the critical path by applying fixed value for selection algorithm due to the comparison tree which has a weak point from structure with the high-speed operation. The proposed ACS uses the decomposition and the pre-computation technique for reducing the complicated degree of the adder, the comparator and multiplexer. According to a simulation result, reduction of area $3.78\%$, power consumption $12.22\%$, maximum gate delay $23.80\%$ occurred from punctured viterbi decoder for DMB system.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.10
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• pp.17-28
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• 1999

In this paper, an ASIC emulation system called ACE (ASIC Emulator) is proposed. It can produce the prototype of target ASIC in a short time and verify the function of ASIC circuit immediately The ACE is consist of emulation software in which there are EDIF reader, library translator, technology mapper, circuit partitioner and LDF generator and emulation hardware including emulation board and logic analyzer. Technology mapping is consist of three steps such as circuit partitioning and extraction of logic function, minimization of logic function and grouping of logic function. During those procedures, the number of basic logic blocks and maximum levels are minimized by making the output to be assigned in a same block sharing product-terms and input variables as much as possible. Circuit partitioner obtain chip-level netlists satisfying some constraints on routing structure of emulation board as well as the architecture of FPGA chip. A new partitioning algorithm whose objective function is the minimization of the number of interconnections among FPGA chips and among group of FPGA chips is proposed. The routing structure of emulation board take the advantage of complete graph and partial crossbar structure in order to minimize the interconnection delay between FPGA chips regardless of circuit size. logic analyzer display the waveform of probing signal on PC monitor that is designated by user. In order to evaluate the performance of the proposed emulation system, video Quad-splitter, one of the commercial ASIC, is implemented on the emulation board. Experimental results show that it is operated in the real time of 14.3MHz and functioned perfectly.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.1
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• pp.39-47
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• 2005

The range of hardware implementation increases in communication systems as high-speed processing is required for high data rate. In the broadband wireless access (BWA) system based on IEEE standard 802.16 the functions of higher part in the MAC layer to Provide data needed for generating MAC PDU are implemented in software, and the tasks from formatting MAC PDUs by using those data to transmitting the messages in a modem are implemented in hardware. In this paper, the interface hardware for efficient message exchange between MAC and PHY layers in the BWA system is designed. The hardware performs the following functions including those of the transmission convergence(TC) sublayer; (1) formatting TC PDU(Protocol data unit) from/to MAC PDU, (2) Reed-solomon(RS) encoding/decoding, and (3) resolving DL MAP and UL MAP, so that it controls transmission slot and uplink and downlink traffic according to the modulation scheme of burst profile. Also, it provides various control signal for PHY modem. In addition, the truncated binary exponential backoff (TBEB) algorithm is implemented in a subscriber station to avoid collision on contention-based transmission of messages. The VLSI architecture performing all these functions is implemented and verified in VHDL.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.10
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• pp.1169-1176
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• 2010

The RF front-end for L1/L2 dual-band Global Positioning System(GPS) receiver is presented in this paper. The RF front-end(down-converter) using low IF architecture consists of a wideband low noise amplifier(LNA), a current mode logic(CML) frequency divider and a I/Q down-conversion mixer with a poly-phase filter for image rejection. The current bleeding technique is used in the LNA and mixer to obtain the high gain and solve the head-room problem. The common drain feedback is adopted for low noise amplifier to achieve the wideband input matching without inductors. The fabricated RF front-end using $0.18{\mu}m$ CMOS process shows a gain of 38 dB for L1 and 41 dB for L2 band. The measured IIP3 is -29 dBm in L1 band and -33 dBm in L2 band, The input return loss is less than -10 dB from 50 MHz to 3 GHz. The measured noise figure(NF) is 3.81 dB for L1 band and 3.71 dB for L2 band. The image rejection ratio is 36.5 dB. The chip size of RF front end is $1.2{\times}1.35mm^2$.

• Journal of Korea Multimedia Society
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• v.1 no.1
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• pp.98-108
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• 1998

In the multimedia tele-medical system the medical informations are stored and managed in multimedia database. Also, multimedia DBMS is essential in order to manage large scale medical informations, and the remote access function is necessary for the distributed processing at all around the hospital. For the multimedia tele-medical information that is composed of image/picture, data, video, and audio, a high-speed telecommunication network is necessary that can provide separated connections for each medical information type with different QoS. The commercial DBMSs are based on the TCP/IP socket API(Application Programming Interface) that does not provide multiple QoS. Also, each commercial DBMS has its own API that is incompatible with other DBMS. In this paper, we propose a multimedia DBMS agent for the remote access of the multimedia database in the tele-medical system. The proposed multimedia DBMS agent is based on the ATM API that can provide high-speed data transfer capability and multiple QoS connections. Also, the proposed multimedia DBMS agent is independent of the commercial DBMS. We explain the functional architecture of the multimedia DBMS agent, implementation technology on the ATM network environment, and the result of performance analysis.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.733-736
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• 2009

Power Line Communication(PLC) is need not additional communication line. So establishment expense is inexpensive and application is simple. Therefore, lower part network of various application field is possible. However, there are high subordinate interference and noise problem on limited transmission data and communication interference element. Wireless Sensor Network(WSN) is need not infrastructure, Self-regulating network architecture of sensor nodes is possible. So at short time, network construction is available. But, power consumption is increased by active sensing for QoS elevation and unnecessary information transmission, low electric power design and necessity of improve protocol are refered to life shortening problem and is studied. In this paper, supplement problem of power line communication and wireless sensor network mutually and because advantage becomes linkage integration control system using synergy effect of two technologies as more restriction be and tries to approach structurally control network that is improved for smooth network environment construction. Honeywell's hybrid sensor network does comparative analysis(benchmarking). Confirm performance elevation proposing teaming of power line communication and wireless sensor network. Through simulation, service delay decreases and confirms that performance elevation.

• Journal of Cadastre & Land InformatiX
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• v.53 no.1
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• pp.83-105
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• 2023

A robot-friendly building certification system was established in 2022 to accommodate the growing number of service robots introduced into buildings. However, this system primarily targeted office buildings, with limitations in applying other functional architectures. To address this problem, we developed a certification model of a robot-friendly environment to extend the existing system to apartment complexes. Using focus group interviews and the analytic hierarchy process, we established 28 evaluating items categorized as (a) architecture and facility design, (b) networks and systems, (c) building operations management, and (d) support for robot activity and other services. These indicators were weighted based on their relative importance within and between categories, resulting in scores ranging from 1 to 18 points and a total of 176 points. According to evaluations with the 28 items, each apartment complex could be graded as "best," "excellent," or "general" based on its total achieved scores. This study is significant, as we present the world's first certification model of a robot-friendly environment for apartment complexes that considers human-robot interactions

• The Journal of the Convergence on Culture Technology
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• v.9 no.3
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• pp.789-795
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• 2023

Digital-Twin are recognized as an important core technology for the realization of Smart Factories by simulating and optimizing the monitoring and predictive maintenance of manufacturing equipment and the operation of production lines in a digital space. To implement this system, we adopt the IEC62541-based OPC-UA (Open Platform Communications Unified-Architecture) Protocol, which has strengths in interoperability and connectivity between heterogeneous platforms. Therefore, In this paper, We designed and implemented an IIoT(Industry Internet of Things) system that connects heterogeneous platforms, and developed an OPC-UA simulator based on IEC 62541. We will present whether the data will be applied to the Digital-Twin Platform and whether it will work, and proceed with performance tests and evaluations. We evaluate the operation performance and OPC-UA performance of the Digital-Twin platform lightened by the proposed device, and present the optimal IEC62514-based simulator system. We proceeded with the performance evaluation of sending and receiving data with OPC-UA wrapping with the proposed simulator, and found that a lightweight Digital-Twin platform can be operated. This research can apply the OPC-UA protocol for implementing smart factory and meta-factory in the manufacturing shop floor with limited resources, avoiding the waste of time and space on the shop floor through the OPC-UA simulator. We expect that this will contribute to a significant improvement in efficiency by minimizing.